From caf4071c8bd4494d2c86d3ef9ea7b17fc74bafca Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Mon, 20 Apr 2020 11:58:23 -0700 Subject: [PATCH] Remove '-ignore_unknown_cells' option from 'sat' --- tests/various/dynamic_part_select.ys | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/tests/various/dynamic_part_select.ys b/tests/various/dynamic_part_select.ys index d7fa14173..abc1daad6 100644 --- a/tests/various/dynamic_part_select.ys +++ b/tests/various/dynamic_part_select.ys @@ -13,7 +13,7 @@ design -copy-from gold -as gold gold design -copy-from gate -as gate gate miter -equiv -make_assert -make_outcmp -flatten gold gate equiv -sat -prove-asserts -seq 10 -show-public -verify -set-init-zero -ignore_unknown_cells equiv +sat -prove-asserts -seq 10 -show-public -verify -set-init-zero equiv ### Multiple blocking assingments ### design -reset @@ -31,7 +31,7 @@ design -copy-from gold -as gold gold design -copy-from gate -as gate gate miter -equiv -make_assert -make_outcmp -flatten gold gate equiv -sat -prove-asserts -seq 10 -show-public -verify -set-init-zero -ignore_unknown_cells equiv +sat -prove-asserts -seq 10 -show-public -verify -set-init-zero equiv ### Non-blocking to the same output register ### design -reset @@ -49,7 +49,7 @@ design -copy-from gold -as gold gold design -copy-from gate -as gate gate miter -equiv -make_assert -make_outcmp -flatten gold gate equiv -sat -prove-asserts -seq 10 -show-public -verify -set-init-zero -ignore_unknown_cells equiv +sat -prove-asserts -seq 10 -show-public -verify -set-init-zero equiv ### For-loop select, one dynamic input design -reset @@ -67,7 +67,7 @@ design -copy-from gold -as gold gold design -copy-from gate -as gate gate miter -equiv -make_assert -make_outcmp -flatten gold gate equiv -sat -prove-asserts -seq 10 -show-public -verify -set-init-zero -ignore_unknown_cells equiv +sat -prove-asserts -seq 10 -show-public -verify -set-init-zero equiv #### Double loop (part-select, reset) ### design -reset @@ -85,7 +85,7 @@ design -copy-from gold -as gold gold design -copy-from gate -as gate gate miter -equiv -make_assert -make_outcmp -flatten gold gate equiv -sat -prove-asserts -seq 10 -show-public -verify -set-init-zero -ignore_unknown_cells equiv +sat -prove-asserts -seq 10 -show-public -verify -set-init-zero equiv ### Reversed part-select case ### design -reset @@ -103,4 +103,4 @@ design -copy-from gold -as gold gold design -copy-from gate -as gate gate miter -equiv -make_assert -make_outcmp -flatten gold gate equiv -sat -prove-asserts -seq 10 -show-public -verify -set-init-zero -ignore_unknown_cells equiv +sat -prove-asserts -seq 10 -show-public -verify -set-init-zero equiv -- 2.30.2