From cb298bbc21fa939617ebb7b98212e950cf50635b Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Fri, 11 Dec 2020 16:25:29 +0000
Subject: [PATCH]

---
 simple_v_extension/appendix.mdwn | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/simple_v_extension/appendix.mdwn b/simple_v_extension/appendix.mdwn
index d4a69b352..c0cfdc15c 100644
--- a/simple_v_extension/appendix.mdwn
+++ b/simple_v_extension/appendix.mdwn
@@ -1458,7 +1458,7 @@ circumstances it is perfectly fine to simply have the lanes
 "inactive" for predicated elements, even though it results in
 less than 100% ALU utilisation.
 
-## Twin-predication (based on source and destination register)
+## Twin-predication (based on source and destination register) <a name="tpred"></a>
 
 Twin-predication is not that much different, except that that
 the source is independently zero-predicated from the destination.
-- 
2.30.2