From cb57e2757aecf6129bf83600b3fab571b011b7b4 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 13 Jul 2020 12:55:48 +0100 Subject: [PATCH] fix read of sliced register --- src/soc/decoder/pseudo/parser.py | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/src/soc/decoder/pseudo/parser.py b/src/soc/decoder/pseudo/parser.py index 9da2f372..957195fb 100644 --- a/src/soc/decoder/pseudo/parser.py +++ b/src/soc/decoder/pseudo/parser.py @@ -655,6 +655,10 @@ class PowerParser: print("power dump trailerlist") print(astor.dump_tree(p[2])) p[0] = apply_trailer(p[1], p[2]) + if isinstance(p[1], ast.Name): + name = p[1].id + if name in ['RA', 'RS', 'RB', 'RC']: + self.read_regs.add(name) def p_atom_name(self, p): """atom : NAME""" @@ -663,11 +667,6 @@ class PowerParser: self.op_fields.add(name) if name == 'overflow': self.write_regs.add(name) - # XXX yuk. this results in extraneous registers being added. - # really should be analysing slice (Assign) and working out if - # the variable being sliced is a GPR. - if name in ['RA', 'RS', 'RB', 'RC']: - self.read_regs.add(name) # add to list of regs to read if self.include_ca_in_write: if name in ['CA', 'CA32']: self.write_regs.add(name) -- 2.30.2