From cb7fe24ab7effe526a03a51fc34f6cce8056d04f Mon Sep 17 00:00:00 2001 From: Bagus Hanindhito Date: Tue, 19 Feb 2019 17:52:23 -0600 Subject: [PATCH] x86: Call the base class's regStats in X86ISA::TLB When I try to build x86 architecture and run the se.py sample script with helloworld example, there is a panic warning stated "Not all stats have been initialized. You may need to add ::regStats() to a new SimObject's regStats() function." I see that in x86 tlb.cc, there is no initialization in regStats() function that causes memory allocation error in some machine which make gem5 exit abnormally. I add the BaseTLB::regStats(); on TLB::regStats() method and can solve the problem Change-Id: I8b62bebc15f896c3136ff4f8253dabbf998f618f Reviewed-on: https://gem5-review.googlesource.com/c/16522 Reviewed-by: Gabe Black Maintainer: Gabe Black --- src/arch/x86/tlb.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 589b2b7eb..829ebce00 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -455,7 +455,7 @@ void TLB::regStats() { using namespace Stats; - + BaseTLB::regStats(); rdAccesses .name(name() + ".rdAccesses") .desc("TLB accesses on read requests"); -- 2.30.2