From cb828b7b18d83cb2ea3dcaed54c1678616c56fc8 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Mon, 4 Jul 2016 13:12:20 +0200 Subject: [PATCH] gm107/ir: fix sign bit emission for FADD32I When emitting OP_SUB, the sign bit for FADD and FADD32I is not at the same position. It's at position 45 for FADD but 51 for FADD32I. This fixes the following piglit test: tests/spec/arb_fragment_program/fdo30337b.shader_test Signed-off-by: Samuel Pitoiset Reviewed-by: Ilia Mirkin Cc: --- .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp index 2c5e8f69d13..f1ba27a1927 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp @@ -1234,6 +1234,9 @@ CodeEmitterGM107::emitFADD() emitABS(0x2e, insn->src(0)); emitNEG(0x2d, insn->src(1)); emitFMZ(0x2c, 1); + + if (insn->op == OP_SUB) + code[1] ^= 0x00002000; } else { emitInsn(0x08000000); emitABS(0x39, insn->src(1)); @@ -1243,10 +1246,10 @@ CodeEmitterGM107::emitFADD() emitNEG(0x35, insn->src(1)); emitCC (0x34); emitIMMD(0x14, 32, insn->src(1)); - } - if (insn->op == OP_SUB) - code[1] ^= 0x00002000; + if (insn->op == OP_SUB) + code[1] ^= 0x00080000; + } emitGPR(0x08, insn->src(0)); emitGPR(0x00, insn->def(0)); -- 2.30.2