From cc01c50c9b1f3273eba6873d87df23cec3e64434 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Mon, 3 Oct 2022 11:45:13 +0100
Subject: [PATCH]

---
 openpower/sv/svp64/discussion.mdwn | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/openpower/sv/svp64/discussion.mdwn b/openpower/sv/svp64/discussion.mdwn
index 7901cbd05..d438df693 100644
--- a/openpower/sv/svp64/discussion.mdwn
+++ b/openpower/sv/svp64/discussion.mdwn
@@ -233,3 +233,10 @@ Normal Mode:
 simple mode is fine including on predication but has a CHANGE OF BEHAVIOUR. first bit of src/dest is used when zeroing is on, but first ENABLED bit of predicate is used when VL>1.
 
 reduce mode is unaffected (meaningless)
+
+## answers to 4, loops
+
+**REMAP**
+
+A REMAP would redirect operations from the first nonmasked
+predicated element.
-- 
2.30.2