From cc0d4a8fd633467952ca7e2c1adcd4ffe508770f Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sun, 6 Dec 2020 17:17:19 -0800 Subject: [PATCH] arm: Fix style in the ISA templates. Change-Id: I3014d26c8649efaf6227f2e3a798cc6c4183a0c5 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38379 Reviewed-by: Giacomo Travaglini Maintainer: Giacomo Travaglini Tested-by: kokoro --- src/arch/arm/isa/templates/basic.isa | 73 ++-- src/arch/arm/isa/templates/branch.isa | 92 +++-- src/arch/arm/isa/templates/branch64.isa | 91 +++-- src/arch/arm/isa/templates/crypto.isa | 9 +- src/arch/arm/isa/templates/data64.isa | 216 ++++++------ src/arch/arm/isa/templates/macromem.isa | 144 ++++---- src/arch/arm/isa/templates/mem.isa | 197 +++++------ src/arch/arm/isa/templates/mem64.isa | 167 ++++----- src/arch/arm/isa/templates/misc.isa | 430 +++++++++++------------- src/arch/arm/isa/templates/misc64.isa | 147 ++++---- src/arch/arm/isa/templates/mult.isa | 44 ++- src/arch/arm/isa/templates/neon.isa | 65 ++-- src/arch/arm/isa/templates/neon64.isa | 106 +++--- src/arch/arm/isa/templates/pred.isa | 109 +++--- src/arch/arm/isa/templates/semihost.isa | 8 +- src/arch/arm/isa/templates/sve.isa | 328 +++++++++--------- src/arch/arm/isa/templates/sve_mem.isa | 376 +++++++++++---------- src/arch/arm/isa/templates/vfp64.isa | 49 ++- 18 files changed, 1299 insertions(+), 1352 deletions(-) diff --git a/src/arch/arm/isa/templates/basic.isa b/src/arch/arm/isa/templates/basic.isa index cde0ce0ff..956f5cdc1 100644 --- a/src/arch/arm/isa/templates/basic.isa +++ b/src/arch/arm/isa/templates/basic.isa @@ -40,65 +40,66 @@ // Basic instruction class declaration template. def template BasicDeclare {{ - /** - * Static instruction class for "%(mnemonic)s". - */ - class %(class_name)s : public %(base_class)s - { - public: - /// Constructor. - %(class_name)s(ExtMachInst machInst); - Fault execute(ExecContext *, - Trace::InstRecord *) const override; - }; + /** + * Static instruction class for "%(mnemonic)s". + */ + class %(class_name)s : public %(base_class)s + { + public: + /// Constructor. + %(class_name)s(ExtMachInst machInst); + Fault execute(ExecContext *, Trace::InstRecord *) const override; + }; }}; // Basic instruction class constructor template. def template BasicConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst) : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s) - { - %(constructor)s; - if (!(condCode == COND_AL || condCode == COND_UC)) { - for (int x = 0; x < _numDestRegs; x++) { - setSrcRegIdx(_numSrcRegs++, destRegIdx(x)); - } - } + %(class_name)s::%(class_name)s(ExtMachInst machInst) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s) + { + %(constructor)s; + if (!(condCode == COND_AL || condCode == COND_UC)) { + for (int x = 0; x < _numDestRegs; x++) { + setSrcRegIdx(_numSrcRegs++, destRegIdx(x)); + } } + } }}; def template BasicConstructor64 {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst) : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s) - { - %(constructor)s; - } + %(class_name)s::%(class_name)s(ExtMachInst machInst) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s) + { + %(constructor)s; + } }}; // Basic instruction class execute method template. def template BasicExecute {{ - Fault %(class_name)s::execute( + Fault + %(class_name)s::execute( ExecContext *xc, Trace::InstRecord *traceData) const - { - Fault fault = NoFault; + { + Fault fault = NoFault; - %(op_decl)s; - %(op_rd)s; - %(code)s; + %(op_decl)s; + %(op_rd)s; + %(code)s; - if (fault == NoFault) - { - %(op_wb)s; - } - return fault; + if (fault == NoFault) { + %(op_wb)s; } + return fault; + } }}; // Basic decode template. def template BasicDecode {{ - return new %(class_name)s(machInst); + return new %(class_name)s(machInst); }}; // Basic decode template, passing mnemonic in as string arg to constructor. def template BasicDecodeWithMnemonic {{ - return new %(class_name)s("%(mnemonic)s", machInst); + return new %(class_name)s("%(mnemonic)s", machInst); }}; diff --git a/src/arch/arm/isa/templates/branch.isa b/src/arch/arm/isa/templates/branch.isa index cccd67f07..e1dcd2f70 100644 --- a/src/arch/arm/isa/templates/branch.isa +++ b/src/arch/arm/isa/templates/branch.isa @@ -38,25 +38,23 @@ def template BranchImmCondDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, int32_t _imm, - ConditionCode _condCode); - Fault execute(ExecContext *, Trace::InstRecord *) const override; - ArmISA::PCState branchTarget( - const ArmISA::PCState &branchPC) const override; - - /// Explicitly import the otherwise hidden branchTarget - using StaticInst::branchTarget; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, int32_t _imm, + ConditionCode _condCode); + Fault execute(ExecContext *, Trace::InstRecord *) const override; + ArmISA::PCState branchTarget( + const ArmISA::PCState &branchPC) const override; + + /// Explicitly import the otherwise hidden branchTarget + using StaticInst::branchTarget; }; }}; def template BranchImmCondConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - int32_t _imm, - ConditionCode _condCode) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _imm, _condCode) + %(class_name)s::%(class_name)s(ExtMachInst machInst, int32_t _imm, + ConditionCode _condCode) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm, _condCode) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -73,20 +71,18 @@ def template BranchImmCondConstructor {{ def template BranchRegCondDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, - ConditionCode _condCode); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, + ConditionCode _condCode); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template BranchRegCondConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _op1, - ConditionCode _condCode) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _op1, _condCode) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _op1, + ConditionCode _condCode) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _condCode) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -105,22 +101,20 @@ def template BranchRegCondConstructor {{ def template BranchTableDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _op1, IntRegIndex _op2); - Fault execute(ExecContext *, Trace::InstRecord *) const override; - Fault initiateAcc(ExecContext *, Trace::InstRecord *) const override; - Fault completeAcc(PacketPtr, ExecContext *, - Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _op2); + Fault execute(ExecContext *, Trace::InstRecord *) const override; + Fault initiateAcc(ExecContext *, Trace::InstRecord *) const override; + Fault completeAcc(PacketPtr, ExecContext *, + Trace::InstRecord *) const override; }; }}; def template BranchRegRegConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _op1, - IntRegIndex _op2) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _op2) + IntRegIndex _op1, IntRegIndex _op2) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _op2) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -137,26 +131,24 @@ def template BranchRegRegConstructor {{ def template BranchImmRegDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - int32_t imm, IntRegIndex _op1); - Fault execute(ExecContext *, Trace::InstRecord *) const override; - ArmISA::PCState branchTarget( - const ArmISA::PCState &branchPC) const override; - - /// Explicitly import the otherwise hidden branchTarget - using StaticInst::branchTarget; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, int32_t imm, IntRegIndex _op1); + Fault execute(ExecContext *, Trace::InstRecord *) const override; + ArmISA::PCState branchTarget( + const ArmISA::PCState &branchPC) const override; + + /// Explicitly import the otherwise hidden branchTarget + using StaticInst::branchTarget; }; }}; // Only used by CBNZ, CBZ which is conditional based on // a register value even though the instruction is always unconditional. def template BranchImmRegConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - int32_t _imm, - IntRegIndex _op1) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm, _op1) + %(class_name)s::%(class_name)s(ExtMachInst machInst, int32_t _imm, + IntRegIndex _op1) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm, _op1) { %(constructor)s; flags[IsCondControl] = true; diff --git a/src/arch/arm/isa/templates/branch64.isa b/src/arch/arm/isa/templates/branch64.isa index 83d4b72b1..7d3a9ac95 100644 --- a/src/arch/arm/isa/templates/branch64.isa +++ b/src/arch/arm/isa/templates/branch64.isa @@ -38,17 +38,16 @@ def template BranchImm64Declare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, int64_t _imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, int64_t _imm); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template BranchImm64Constructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - int64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, int64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm) { %(constructor)s; } @@ -57,20 +56,18 @@ def template BranchImm64Constructor {{ def template BranchImmCond64Declare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, int64_t _imm, - ConditionCode _condCode); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, int64_t _imm, + ConditionCode _condCode); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template BranchImmCond64Constructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - int64_t _imm, - ConditionCode _condCode) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _imm, _condCode) + %(class_name)s::%(class_name)s( + ExtMachInst machInst, int64_t _imm, ConditionCode _condCode) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm, _condCode) { %(constructor)s; } @@ -79,17 +76,16 @@ def template BranchImmCond64Constructor {{ def template BranchReg64Declare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _op1); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _op1); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template BranchReg64Constructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _op1) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _op1) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1) { %(constructor)s; } @@ -98,18 +94,17 @@ def template BranchReg64Constructor {{ def template BranchRegReg64Declare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, - IntRegIndex _op2); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _op2); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template BranchRegReg64Constructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _op1, - IntRegIndex _op2) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _op2) + IntRegIndex _op2) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _op2) { %(constructor)s; } @@ -118,19 +113,17 @@ def template BranchRegReg64Constructor {{ def template BranchImmReg64Declare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - int64_t imm, IntRegIndex _op1); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, int64_t imm, IntRegIndex _op1); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template BranchImmReg64Constructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - int64_t _imm, - IntRegIndex _op1) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm, _op1) + %(class_name)s::%(class_name)s(ExtMachInst machInst, int64_t _imm, + IntRegIndex _op1) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm, _op1) { %(constructor)s; } @@ -139,20 +132,20 @@ def template BranchImmReg64Constructor {{ def template BranchImmImmReg64Declare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, int64_t _imm1, int64_t _imm2, - IntRegIndex _op1); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, int64_t _imm1, int64_t _imm2, + IntRegIndex _op1); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template BranchImmImmReg64Constructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - int64_t _imm1, int64_t _imm2, - IntRegIndex _op1) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _imm1, _imm2, _op1) + int64_t _imm1, int64_t _imm2, + IntRegIndex _op1) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _imm1, _imm2, _op1) { %(constructor)s; } diff --git a/src/arch/arm/isa/templates/crypto.isa b/src/arch/arm/isa/templates/crypto.isa index 9b1ad9f0b..417d64322 100644 --- a/src/arch/arm/isa/templates/crypto.isa +++ b/src/arch/arm/isa/templates/crypto.isa @@ -47,15 +47,14 @@ def template CryptoPredOpExecute {{ const unsigned rCount = %(r_count)d; - union RegVect { + union RegVect + { uint32_t regs[rCount]; }; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { %(code)s; - if (fault == NoFault) - { + if (fault == NoFault) { %(op_wb)s; } } else { diff --git a/src/arch/arm/isa/templates/data64.isa b/src/arch/arm/isa/templates/data64.isa index ea7b71410..0da27cd05 100644 --- a/src/arch/arm/isa/templates/data64.isa +++ b/src/arch/arm/isa/templates/data64.isa @@ -38,21 +38,20 @@ def template DataXImmDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1, uint64_t _imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, uint64_t _imm); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template DataXImmConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _imm) + IntRegIndex _dest, IntRegIndex _op1, + uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm) { %(constructor)s; } @@ -61,24 +60,22 @@ def template DataXImmConstructor {{ def template DataXSRegDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1, IntRegIndex _op2, - int32_t _shiftAmt, ArmShiftType _shiftType); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + int32_t _shiftAmt, ArmShiftType _shiftType); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template DataXSRegConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - IntRegIndex _op2, - int32_t _shiftAmt, - ArmShiftType _shiftType) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _shiftAmt, _shiftType) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + int32_t _shiftAmt, + ArmShiftType _shiftType) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _shiftAmt, _shiftType) { %(constructor)s; } @@ -87,24 +84,22 @@ def template DataXSRegConstructor {{ def template DataXERegDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1, IntRegIndex _op2, - ArmExtendType _extendType, int32_t _shiftAmt); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + ArmExtendType _extendType, int32_t _shiftAmt); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template DataXERegConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - IntRegIndex _op2, - ArmExtendType _extendType, - int32_t _shiftAmt) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _extendType, _shiftAmt) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + ArmExtendType _extendType, + int32_t _shiftAmt) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _extendType, _shiftAmt) { %(constructor)s; } @@ -113,19 +108,17 @@ def template DataXERegConstructor {{ def template DataX1RegDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template DataX1RegConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1) + IntRegIndex _dest, IntRegIndex _op1) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1) { %(constructor)s; } @@ -134,21 +127,19 @@ def template DataX1RegConstructor {{ def template DataX2RegDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1, IntRegIndex _op2); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template DataX2RegConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - IntRegIndex _op2) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2) { %(constructor)s; } @@ -157,22 +148,20 @@ def template DataX2RegConstructor {{ def template DataX2RegImmDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1, IntRegIndex _op2, uint64_t _imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, uint64_t _imm); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template DataX2RegImmConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - IntRegIndex _op2, - uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _imm) { %(constructor)s; } @@ -181,22 +170,20 @@ def template DataX2RegImmConstructor {{ def template DataX3RegDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1, IntRegIndex _op2, IntRegIndex _op3); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, IntRegIndex _op3); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template DataX3RegConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - IntRegIndex _op2, - IntRegIndex _op3) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _op3) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + IntRegIndex _op3) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _op3) { %(constructor)s; } @@ -205,22 +192,20 @@ def template DataX3RegConstructor {{ def template DataXCondCompImmDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, - uint64_t _imm, ConditionCode _condCode, uint8_t _defCc); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, + uint64_t _imm, ConditionCode _condCode, uint8_t _defCc); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template DataXCondCompImmConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _op1, - uint64_t _imm, - ConditionCode _condCode, - uint8_t _defCc) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _op1, _imm, _condCode, _defCc) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _op1, + uint64_t _imm, ConditionCode _condCode, + uint8_t _defCc) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _op1, _imm, _condCode, _defCc) { %(constructor)s; } @@ -229,23 +214,20 @@ def template DataXCondCompImmConstructor {{ def template DataXCondCompRegDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, - IntRegIndex _op2, ConditionCode _condCode, - uint8_t _defCc); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, + IntRegIndex _op2, ConditionCode _condCode, uint8_t _defCc); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template DataXCondCompRegConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _op1, - IntRegIndex _op2, - ConditionCode _condCode, - uint8_t _defCc) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _op1, _op2, _condCode, _defCc) + IntRegIndex _op1, IntRegIndex _op2, + ConditionCode _condCode, uint8_t _defCc) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _op1, _op2, _condCode, _defCc) { %(constructor)s; } @@ -254,23 +236,21 @@ def template DataXCondCompRegConstructor {{ def template DataXCondSelDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1, IntRegIndex _op2, - ConditionCode _condCode); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + ConditionCode _condCode); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template DataXCondSelConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - IntRegIndex _op2, - ConditionCode _condCode) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _condCode) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + ConditionCode _condCode) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _condCode) { %(constructor)s; } diff --git a/src/arch/arm/isa/templates/macromem.isa b/src/arch/arm/isa/templates/macromem.isa index 0eb918e0a..d851f464f 100644 --- a/src/arch/arm/isa/templates/macromem.isa +++ b/src/arch/arm/isa/templates/macromem.isa @@ -62,8 +62,8 @@ def template MicroMemConstructor {{ RegIndex _ura, RegIndex _urb, bool _up, - uint8_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + uint8_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _ura, _urb, _up, _imm) { %(constructor)s; @@ -96,9 +96,9 @@ def template MicroMemPairConstructor {{ RegIndex _dreg2, RegIndex _base, bool _up, - uint8_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dreg1, _dreg2, _base, _up, _imm) + uint8_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dreg1, _dreg2, _base, _up, _imm) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -120,8 +120,8 @@ def template MicroNeonMemDeclare {{ { public: %(class_name)s(ExtMachInst machInst, RegIndex _dest, - RegIndex _ura, uint32_t _imm, unsigned extraMemFlags) - : %(base_class)s("%(mnemonic)s", machInst, + RegIndex _ura, uint32_t _imm, unsigned extraMemFlags) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _ura, _imm) { memAccessFlags |= extraMemFlags; @@ -162,8 +162,8 @@ def template MicroSetPCCPSRConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _ura, IntRegIndex _urb, - IntRegIndex _urc) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + IntRegIndex _urc) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _ura, _urb, _urc) { %(constructor)s; @@ -239,11 +239,9 @@ def template MicroNeonMixExecute {{ %(op_decl)s; %(op_rd)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { %(code)s; - if (fault == NoFault) - { + if (fault == NoFault) { %(op_wb)s; } } else { @@ -331,9 +329,9 @@ def template MicroIntImmConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, RegIndex _ura, RegIndex _urb, - int32_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _ura, _urb, _imm) + int32_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _ura, _urb, _imm) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -348,8 +346,8 @@ def template MicroIntImmXConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, RegIndex _ura, RegIndex _urb, - int32_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + int32_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _ura, _urb, _imm) { %(constructor)s; @@ -370,9 +368,9 @@ def template MicroIntRegDeclare {{ def template MicroIntXERegConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, RegIndex _ura, RegIndex _urb, RegIndex _urc, - ArmExtendType _type, uint32_t _shiftAmt) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _ura, _urb, _urc, _type, _shiftAmt) + ArmExtendType _type, uint32_t _shiftAmt) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _ura, _urb, _urc, _type, _shiftAmt) { %(constructor)s; } @@ -392,9 +390,10 @@ def template MicroIntXERegDeclare {{ def template MicroIntRegConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, RegIndex _ura, RegIndex _urb, RegIndex _urc, - int32_t _shiftAmt, ArmShiftType _shiftType) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _ura, _urb, _urc, _shiftAmt, _shiftType) + int32_t _shiftAmt, + ArmShiftType _shiftType) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _ura, _urb, _urc, _shiftAmt, _shiftType) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -416,19 +415,18 @@ def template MacroMemDeclare {{ */ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex rn, - bool index, bool up, bool user, bool writeback, bool load, - uint32_t reglist); + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex rn, bool index, bool up, + bool user, bool writeback, bool load, uint32_t reglist); }; }}; def template MacroMemConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex rn, bool index, bool up, bool user, bool writeback, bool load, - uint32_t reglist) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, rn, + uint32_t reglist) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, rn, index, up, user, writeback, load, reglist) { %(constructor)s; @@ -453,8 +451,8 @@ class %(class_name)s : public %(base_class)s def template BigFpMemImmConstructor {{ %(class_name)s::%(class_name)s(const char *mnemonic, ExtMachInst machInst, - bool load, IntRegIndex dest, IntRegIndex base, int64_t imm) - : %(base_class)s(mnemonic, machInst, %(op_class)s, load, dest, base, imm) + bool load, IntRegIndex dest, IntRegIndex base, int64_t imm) : + %(base_class)s(mnemonic, machInst, %(op_class)s, load, dest, base, imm) { %(constructor)s; } @@ -474,9 +472,9 @@ class %(class_name)s : public %(base_class)s def template BigFpMemRegConstructor {{ %(class_name)s::%(class_name)s(const char *mnemonic, ExtMachInst machInst, bool load, IntRegIndex dest, IntRegIndex base, - IntRegIndex offset, ArmExtendType type, int64_t imm) - : %(base_class)s(mnemonic, machInst, %(op_class)s, load, dest, base, - offset, type, imm) + IntRegIndex offset, ArmExtendType type, int64_t imm) : + %(base_class)s(mnemonic, machInst, %(op_class)s, load, dest, base, + offset, type, imm) { %(constructor)s; } @@ -494,8 +492,8 @@ class %(class_name)s : public %(base_class)s def template BigFpMemLitConstructor {{ %(class_name)s::%(class_name)s(const char *mnemonic, ExtMachInst machInst, - IntRegIndex dest, int64_t imm) - : %(base_class)s(mnemonic, machInst, %(op_class)s, dest, imm) + IntRegIndex dest, int64_t imm) : + %(base_class)s(mnemonic, machInst, %(op_class)s, dest, imm) { %(constructor)s; } @@ -504,13 +502,13 @@ def template BigFpMemLitConstructor {{ def template PairMemDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(const char *mnemonic, ExtMachInst machInst, - uint32_t size, bool fp, bool load, bool noAlloc, bool signExt, - bool exclusive, bool acrel, uint32_t imm, - AddrMode mode, IntRegIndex rn, IntRegIndex rt, - IntRegIndex rt2); + public: + // Constructor + %(class_name)s(const char *mnemonic, ExtMachInst machInst, + uint32_t size, bool fp, bool load, bool noAlloc, bool signExt, + bool exclusive, bool acrel, uint32_t imm, + AddrMode mode, IntRegIndex rn, IntRegIndex rt, + IntRegIndex rt2); }; }}; @@ -518,10 +516,10 @@ def template PairMemConstructor {{ %(class_name)s::%(class_name)s(const char *mnemonic, ExtMachInst machInst, uint32_t size, bool fp, bool load, bool noAlloc, bool signExt, bool exclusive, bool acrel, uint32_t imm, AddrMode mode, - IntRegIndex rn, IntRegIndex rt, IntRegIndex rt2) - : %(base_class)s(mnemonic, machInst, %(op_class)s, size, - fp, load, noAlloc, signExt, exclusive, acrel, - imm, mode, rn, rt, rt2) + IntRegIndex rn, IntRegIndex rt, IntRegIndex rt2) : + %(base_class)s(mnemonic, machInst, %(op_class)s, size, + fp, load, noAlloc, signExt, exclusive, acrel, + imm, mode, rn, rt, rt2) { %(constructor)s; } @@ -530,20 +528,20 @@ def template PairMemConstructor {{ def template VMemMultDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, unsigned width, - RegIndex rn, RegIndex vd, unsigned regs, unsigned inc, - uint32_t size, uint32_t align, RegIndex rm); + public: + // Constructor + %(class_name)s(ExtMachInst machInst, unsigned width, + RegIndex rn, RegIndex vd, unsigned regs, unsigned inc, + uint32_t size, uint32_t align, RegIndex rm); }; }}; def template VMemMultConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, unsigned width, RegIndex rn, RegIndex vd, unsigned regs, unsigned inc, - uint32_t size, uint32_t align, RegIndex rm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, width, - rn, vd, regs, inc, size, align, rm) + uint32_t size, uint32_t align, RegIndex rm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, width, + rn, vd, regs, inc, size, align, rm) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -557,20 +555,20 @@ def template VMemMultConstructor {{ def template VMemSingleDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, bool all, unsigned width, - RegIndex rn, RegIndex vd, unsigned regs, unsigned inc, - uint32_t size, uint32_t align, RegIndex rm, unsigned lane = 0); + public: + // Constructor + %(class_name)s(ExtMachInst machInst, bool all, unsigned width, + RegIndex rn, RegIndex vd, unsigned regs, unsigned inc, + uint32_t size, uint32_t align, RegIndex rm, unsigned lane=0); }; }}; def template VMemSingleConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, bool all, unsigned width, RegIndex rn, RegIndex vd, unsigned regs, unsigned inc, - uint32_t size, uint32_t align, RegIndex rm, unsigned lane) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, all, width, - rn, vd, regs, inc, size, align, rm, lane) + uint32_t size, uint32_t align, RegIndex rm, unsigned lane) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, all, width, + rn, vd, regs, inc, size, align, rm, lane) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -587,20 +585,20 @@ def template MacroVFPMemDeclare {{ */ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex rn, - RegIndex vd, bool single, bool up, bool writeback, - bool load, uint32_t offset); + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex rn, + RegIndex vd, bool single, bool up, bool writeback, + bool load, uint32_t offset); }; }}; def template MacroVFPMemConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex rn, RegIndex vd, bool single, bool up, bool writeback, bool load, - uint32_t offset) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, rn, - vd, single, up, writeback, load, offset) + uint32_t offset) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, rn, + vd, single, up, writeback, load, offset) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { diff --git a/src/arch/arm/isa/templates/mem.isa b/src/arch/arm/isa/templates/mem.isa index c0356c9c9..f83dca61a 100644 --- a/src/arch/arm/isa/templates/mem.isa +++ b/src/arch/arm/isa/templates/mem.isa @@ -40,8 +40,9 @@ def template PanicExecute {{ - Fault %(class_name)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { panic("Execute function executed when it shouldn't be!\n"); return NoFault; @@ -49,8 +50,9 @@ def template PanicExecute {{ }}; def template PanicInitiateAcc {{ - Fault %(class_name)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { panic("InitiateAcc function executed when it shouldn't be!\n"); return NoFault; @@ -58,8 +60,9 @@ def template PanicInitiateAcc {{ }}; def template PanicCompleteAcc {{ - Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, + Trace::InstRecord *traceData) const { panic("CompleteAcc function executed when it shouldn't be!\n"); return NoFault; @@ -68,8 +71,9 @@ def template PanicCompleteAcc {{ def template SwapExecute {{ - Fault %(class_name)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -79,8 +83,7 @@ def template SwapExecute {{ %(op_rd)s; %(ea_code)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { %(preacc_code)s; if (fault == NoFault) { @@ -104,8 +107,9 @@ def template SwapExecute {{ }}; def template SwapInitiateAcc {{ - Fault %(class_name)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -115,8 +119,7 @@ def template SwapInitiateAcc {{ %(op_rd)s; %(ea_code)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { %(preacc_code)s; if (fault == NoFault) { @@ -132,16 +135,16 @@ def template SwapInitiateAcc {{ }}; def template SwapCompleteAcc {{ - Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, + Trace::InstRecord *traceData) const { Fault fault = NoFault; %(op_decl)s; %(op_rd)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { // ARM instructions will not have a pkt if the predicate is false getMemLE(pkt, Mem, traceData); uint64_t memData = Mem; @@ -158,8 +161,9 @@ def template SwapCompleteAcc {{ }}; def template LoadExecute {{ - Fault %(class_name)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -168,8 +172,7 @@ def template LoadExecute {{ %(op_rd)s; %(ea_code)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { if (fault == NoFault) { fault = readMemAtomicLE( xc, traceData, EA, Mem, memAccessFlags); @@ -189,7 +192,8 @@ def template LoadExecute {{ def template NeonLoadExecute {{ template - Fault %(class_name)s::execute( + Fault + %(class_name)s::execute( ExecContext *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -203,8 +207,7 @@ def template NeonLoadExecute {{ MemUnion memUnion; uint8_t *dataPtr = memUnion.bytes; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { if (fault == NoFault) { const auto size = %(size)d; fault = readMemAtomic(xc, EA, dataPtr, @@ -225,8 +228,9 @@ def template NeonLoadExecute {{ }}; def template StoreExecute {{ - Fault %(class_name)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -235,8 +239,7 @@ def template StoreExecute {{ %(op_rd)s; %(ea_code)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { if (fault == NoFault) { %(memacc_code)s; } @@ -259,7 +262,8 @@ def template StoreExecute {{ def template NeonStoreExecute {{ template - Fault %(class_name)s::execute( + Fault + %(class_name)s::execute( ExecContext *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -273,8 +277,7 @@ def template NeonStoreExecute {{ MemUnion memUnion; uint8_t *dataPtr = memUnion.bytes; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { if (fault == NoFault) { %(memacc_code)s; } @@ -298,8 +301,9 @@ def template NeonStoreExecute {{ }}; def template StoreExExecute {{ - Fault %(class_name)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -308,8 +312,7 @@ def template StoreExExecute {{ %(op_rd)s; %(ea_code)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { if (fault == NoFault) { %(memacc_code)s; } @@ -337,8 +340,9 @@ def template StoreExExecute {{ }}; def template StoreExInitiateAcc {{ - Fault %(class_name)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -347,8 +351,7 @@ def template StoreExInitiateAcc {{ %(op_rd)s; %(ea_code)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { if (fault == NoFault) { %(memacc_code)s; } @@ -366,8 +369,9 @@ def template StoreExInitiateAcc {{ }}; def template StoreInitiateAcc {{ - Fault %(class_name)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -376,8 +380,7 @@ def template StoreInitiateAcc {{ %(op_rd)s; %(ea_code)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { if (fault == NoFault) { %(memacc_code)s; } @@ -396,7 +399,8 @@ def template StoreInitiateAcc {{ def template NeonStoreInitiateAcc {{ template - Fault %(class_name)s::initiateAcc( + Fault + %(class_name)s::initiateAcc( ExecContext *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -407,8 +411,7 @@ def template NeonStoreInitiateAcc {{ %(op_rd)s; %(ea_code)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { MemUnion memUnion; if (fault == NoFault) { %(memacc_code)s; @@ -429,8 +432,9 @@ def template NeonStoreInitiateAcc {{ }}; def template LoadInitiateAcc {{ - Fault %(class_name)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -439,8 +443,7 @@ def template LoadInitiateAcc {{ %(op_rd)s; %(ea_code)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { if (fault == NoFault) { fault = initiateMemRead(xc, traceData, EA, Mem, memAccessFlags); @@ -455,7 +458,8 @@ def template LoadInitiateAcc {{ def template NeonLoadInitiateAcc {{ template - Fault %(class_name)s::initiateAcc( + Fault + %(class_name)s::initiateAcc( ExecContext *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -466,8 +470,7 @@ def template NeonLoadInitiateAcc {{ %(op_rd)s; %(ea_code)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { if (fault == NoFault) { const auto size = %(size)d; fault = initiateMemRead(xc, EA, size, memAccessFlags, @@ -482,16 +485,16 @@ def template NeonLoadInitiateAcc {{ }}; def template LoadCompleteAcc {{ - Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, + Trace::InstRecord *traceData) const { Fault fault = NoFault; %(op_decl)s; %(op_rd)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { // ARM instructions will not have a pkt if the predicate is false getMemLE(pkt, Mem, traceData); @@ -510,9 +513,9 @@ def template LoadCompleteAcc {{ def template NeonLoadCompleteAcc {{ template - Fault %(class_name)s::completeAcc( - PacketPtr pkt, ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::completeAcc( + PacketPtr pkt, ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -520,8 +523,7 @@ def template NeonLoadCompleteAcc {{ %(op_decl)s; %(op_rd)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { // ARM instructions will not have a pkt if the predicate is false MemUnion &memUnion = *(MemUnion *)pkt->getPtr(); @@ -539,8 +541,9 @@ def template NeonLoadCompleteAcc {{ }}; def template StoreCompleteAcc {{ - Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, + Trace::InstRecord *traceData) const { return NoFault; } @@ -548,7 +551,8 @@ def template StoreCompleteAcc {{ def template NeonStoreCompleteAcc {{ template - Fault %(class_name)s::completeAcc( + Fault + %(class_name)s::completeAcc( PacketPtr pkt, ExecContext *xc, Trace::InstRecord *traceData) const { return NoFault; @@ -556,16 +560,16 @@ def template NeonStoreCompleteAcc {{ }}; def template StoreExCompleteAcc {{ - Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, + Trace::InstRecord *traceData) const { Fault fault = NoFault; %(op_decl)s; %(op_rd)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { uint64_t writeResult = pkt->req->getExtraData(); %(postacc_code)s; @@ -845,9 +849,9 @@ def template LoadImmDeclare {{ def template RfeConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - uint32_t _base, int _mode, bool _wb) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - (IntRegIndex)_base, (AddrMode)_mode, _wb) + uint32_t _base, int _mode, bool _wb) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + (IntRegIndex)_base, (AddrMode)_mode, _wb) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -875,8 +879,8 @@ def template RfeConstructor {{ def template SrsConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - uint32_t _regMode, int _mode, bool _wb) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + uint32_t _regMode, int _mode, bool _wb) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, (OperatingMode)_regMode, (AddrMode)_mode, _wb) { %(constructor)s; @@ -899,8 +903,8 @@ def template SrsConstructor {{ def template SwapConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - uint32_t _dest, uint32_t _op1, uint32_t _base) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + uint32_t _dest, uint32_t _op1, uint32_t _base) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, (IntRegIndex)_dest, (IntRegIndex)_op1, (IntRegIndex)_base) { %(constructor)s; @@ -915,8 +919,8 @@ def template SwapConstructor {{ def template LoadStoreDImmConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, uint32_t _dest, uint32_t _dest2, - uint32_t _base, bool _add, int32_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + uint32_t _base, bool _add, int32_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, (IntRegIndex)_dest, (IntRegIndex)_dest2, (IntRegIndex)_base, _add, _imm) { @@ -941,10 +945,9 @@ def template LoadStoreDImmConstructor {{ def template StoreExDImmConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, uint32_t _result, uint32_t _dest, uint32_t _dest2, - uint32_t _base, bool _add, int32_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - (IntRegIndex)_result, - (IntRegIndex)_dest, (IntRegIndex)_dest2, + uint32_t _base, bool _add, int32_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + (IntRegIndex)_result, (IntRegIndex)_dest, (IntRegIndex)_dest2, (IntRegIndex)_base, _add, _imm) { %(constructor)s; @@ -968,8 +971,8 @@ def template StoreExDImmConstructor {{ def template LoadStoreImmConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - uint32_t _dest, uint32_t _base, bool _add, int32_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + uint32_t _dest, uint32_t _base, bool _add, int32_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, (IntRegIndex)_dest, (IntRegIndex)_base, _add, _imm) { %(constructor)s; @@ -993,8 +996,8 @@ def template LoadStoreImmConstructor {{ def template StoreExImmConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, uint32_t _result, uint32_t _dest, uint32_t _base, - bool _add, int32_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + bool _add, int32_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, (IntRegIndex)_result, (IntRegIndex)_dest, (IntRegIndex)_base, _add, _imm) { @@ -1020,8 +1023,8 @@ def template StoreExImmConstructor {{ def template StoreDRegConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, uint32_t _dest, uint32_t _dest2, uint32_t _base, bool _add, - int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, (IntRegIndex)_dest, (IntRegIndex)_dest2, (IntRegIndex)_base, _add, _shiftAmt, (ArmShiftType)_shiftType, @@ -1049,8 +1052,8 @@ def template StoreDRegConstructor {{ def template StoreRegConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, uint32_t _dest, uint32_t _base, bool _add, - int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, (IntRegIndex)_dest, (IntRegIndex)_base, _add, _shiftAmt, (ArmShiftType)_shiftType, (IntRegIndex)_index) @@ -1077,8 +1080,8 @@ def template StoreRegConstructor {{ def template LoadDRegConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, uint32_t _dest, uint32_t _dest2, uint32_t _base, bool _add, - int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, (IntRegIndex)_dest, (IntRegIndex)_dest2, (IntRegIndex)_base, _add, _shiftAmt, (ArmShiftType)_shiftType, @@ -1119,8 +1122,8 @@ def template LoadDRegConstructor {{ def template LoadRegConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, uint32_t _dest, uint32_t _base, bool _add, - int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + int32_t _shiftAmt, uint32_t _shiftType, uint32_t _index) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, (IntRegIndex)_dest, (IntRegIndex)_base, _add, _shiftAmt, (ArmShiftType)_shiftType, (IntRegIndex)_index) @@ -1187,8 +1190,8 @@ def template LoadRegConstructor {{ def template LoadImmConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - uint32_t _dest, uint32_t _base, bool _add, int32_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + uint32_t _dest, uint32_t _base, bool _add, int32_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, (IntRegIndex)_dest, (IntRegIndex)_base, _add, _imm) { %(constructor)s; diff --git a/src/arch/arm/isa/templates/mem64.isa b/src/arch/arm/isa/templates/mem64.isa index 98d064554..ffc28c4f3 100644 --- a/src/arch/arm/isa/templates/mem64.isa +++ b/src/arch/arm/isa/templates/mem64.isa @@ -45,8 +45,9 @@ let {{ }}; def template Load64Execute {{ - Fault %(class_name)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -69,8 +70,9 @@ def template Load64Execute {{ }}; def template Load64FpExecute {{ - Fault %(class_name)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -93,8 +95,9 @@ def template Load64FpExecute {{ }}; def template Store64Execute {{ - Fault %(class_name)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -109,7 +112,7 @@ def template Store64Execute {{ if (fault == NoFault) { fault = writeMemAtomicLE(xc, traceData, Mem, EA, - memAccessFlags, NULL); + memAccessFlags, nullptr); } if (fault == NoFault) { @@ -121,8 +124,9 @@ def template Store64Execute {{ }}; def template Store64InitiateAcc {{ - Fault %(class_name)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -137,7 +141,7 @@ def template Store64InitiateAcc {{ if (fault == NoFault) { fault = writeMemTimingLE(xc, traceData, Mem, EA, memAccessFlags, - NULL); + nullptr); } return fault; @@ -145,8 +149,9 @@ def template Store64InitiateAcc {{ }}; def template StoreEx64Execute {{ - Fault %(class_name)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -178,8 +183,9 @@ def template StoreEx64Execute {{ }}; def template StoreEx64InitiateAcc {{ - Fault %(class_name)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -194,7 +200,7 @@ def template StoreEx64InitiateAcc {{ if (fault == NoFault) { fault = writeMemTimingLE(xc, traceData, Mem, EA, memAccessFlags, - NULL); + nullptr); } return fault; @@ -202,8 +208,9 @@ def template StoreEx64InitiateAcc {{ }}; def template Load64InitiateAcc {{ - Fault %(class_name)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -221,8 +228,9 @@ def template Load64InitiateAcc {{ }}; def template Load64CompleteAcc {{ - Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, + Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -245,16 +253,18 @@ def template Load64CompleteAcc {{ }}; def template Store64CompleteAcc {{ - Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, + Trace::InstRecord *traceData) const { return NoFault; } }}; def template StoreEx64CompleteAcc {{ - Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, + Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -296,9 +306,9 @@ def template DCStore64Declare {{ def template DCStore64Constructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _base, - MiscRegIndex _dest, uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _base, _dest, _imm) + MiscRegIndex _dest, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _base, _dest, _imm) { %(constructor)s; assert(!%(use_uops)d); @@ -306,8 +316,9 @@ def template DCStore64Constructor {{ }}; def template DCStore64Execute {{ - Fault %(class_name)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -322,8 +333,8 @@ def template DCStore64Execute {{ } if (fault == NoFault) { - fault = writeMemAtomic(xc, NULL, EA, - op_size, memAccessFlags, NULL, + fault = writeMemAtomic(xc, nullptr, EA, + op_size, memAccessFlags, nullptr, std::vector(op_size, true)); } @@ -336,8 +347,9 @@ def template DCStore64Execute {{ }}; def template DCStore64InitiateAcc {{ - Fault %(class_name)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -351,8 +363,8 @@ def template DCStore64InitiateAcc {{ } if (fault == NoFault) { - fault = writeMemTiming(xc, NULL, EA, op_size, - memAccessFlags, NULL, + fault = writeMemTiming(xc, nullptr, EA, op_size, + memAccessFlags, nullptr, std::vector(op_size, true)); } @@ -590,9 +602,9 @@ def template LoadStoreLitU64Declare {{ def template LoadStoreImm64Constructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _base, int64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - (IntRegIndex)_dest, (IntRegIndex)_base, _imm) + IntRegIndex _dest, IntRegIndex _base, int64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + (IntRegIndex)_dest, (IntRegIndex)_base, _imm) { %(constructor)s; #if %(use_uops)d @@ -610,9 +622,9 @@ def template LoadStoreImm64Constructor {{ def template LoadStoreImmU64Constructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _base, int64_t _imm, - bool noAlloc, bool exclusive, bool acrel) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _base, _imm) + bool noAlloc, bool exclusive, bool acrel) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _base, _imm) { %(constructor)s; assert(!%(use_uops)d); @@ -623,9 +635,9 @@ def template LoadStoreImmU64Constructor {{ def template LoadStoreImmDU64Constructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _dest2, IntRegIndex _base, - int64_t _imm, bool noAlloc, bool exclusive, bool acrel) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _dest2, _base, _imm) + int64_t _imm, bool noAlloc, bool exclusive, bool acrel) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _dest2, _base, _imm) { %(constructor)s; assert(!%(use_uops)d); @@ -636,9 +648,9 @@ def template LoadStoreImmDU64Constructor {{ def template StoreImmDEx64Constructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _result, IntRegIndex _dest, IntRegIndex _dest2, - IntRegIndex _base, int64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _result, _dest, _dest2, _base, _imm) + IntRegIndex _base, int64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _result, _dest, _dest2, _base, _imm) { %(constructor)s; assert(!%(use_uops)d); @@ -649,9 +661,9 @@ def template StoreImmDEx64Constructor {{ def template LoadStoreReg64Constructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _base, IntRegIndex _offset, - ArmExtendType _type, uint32_t _shiftAmt) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _base, _offset, _type, _shiftAmt) + ArmExtendType _type, uint32_t _shiftAmt) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _base, _offset, _type, _shiftAmt) { %(constructor)s; #if %(use_uops)d @@ -671,9 +683,9 @@ def template LoadStoreRegU64Constructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _base, IntRegIndex _offset, ArmExtendType _type, uint32_t _shiftAmt, - bool noAlloc, bool exclusive, bool acrel) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _base, _offset, _type, _shiftAmt) + bool noAlloc, bool exclusive, bool acrel) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _base, _offset, _type, _shiftAmt) { %(constructor)s; assert(!%(use_uops)d); @@ -683,8 +695,8 @@ def template LoadStoreRegU64Constructor {{ def template LoadStoreRaw64Constructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _base) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _base) + IntRegIndex _dest, IntRegIndex _base) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _base) { %(constructor)s; } @@ -692,9 +704,9 @@ def template LoadStoreRaw64Constructor {{ def template LoadStoreEx64Constructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _base, IntRegIndex _result) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _base, _result) + IntRegIndex _dest, IntRegIndex _base, IntRegIndex _result) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _base, _result) { %(constructor)s; } @@ -702,8 +714,8 @@ def template LoadStoreEx64Constructor {{ def template LoadStoreLit64Constructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, int64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + IntRegIndex _dest, int64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, (IntRegIndex)_dest, _imm) { %(constructor)s; @@ -722,8 +734,8 @@ def template LoadStoreLit64Constructor {{ def template LoadStoreLitU64Constructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, int64_t _imm, - bool noAlloc, bool exclusive, bool acrel) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + bool noAlloc, bool exclusive, bool acrel) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, (IntRegIndex)_dest, _imm) { %(constructor)s; @@ -735,8 +747,9 @@ def template LoadStoreLitU64Constructor {{ // Atomic operations in memory def template AmoOpExecute {{ - Fault %(class_name)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; @@ -764,8 +777,9 @@ def template AmoOpExecute {{ }}; def template AmoOpInitiateAcc {{ - Fault %(class_name)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; @@ -785,8 +799,9 @@ def template AmoOpInitiateAcc {{ }}; def template AmoOpCompleteAcc {{ - Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, + Trace::InstRecord *traceData) const { %(op_decl)s; %(op_rd)s; @@ -828,9 +843,9 @@ def template AmoOpDeclare {{ def template AmoOpConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _base, IntRegIndex _result) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _base, _result) + IntRegIndex _dest, IntRegIndex _base, IntRegIndex _result) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _base, _result) { %(constructor)s; flags[IsStore] = false; @@ -865,9 +880,9 @@ def template AmoPairOpDeclare {{ def template AmoPairOpConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _base, IntRegIndex _result) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _base, _result) + IntRegIndex _dest, IntRegIndex _base, IntRegIndex _result) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _base, _result) { %(constructor)s; @@ -909,8 +924,8 @@ def template AmoArithmeticOpDeclare {{ def template AmoArithmeticOpConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _base, IntRegIndex _result) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + IntRegIndex _dest, IntRegIndex _base, IntRegIndex _result) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _base, _result) { %(constructor)s; @@ -918,7 +933,7 @@ def template AmoArithmeticOpConstructor {{ uint32_t r2 = RegId(IntRegClass, dest).index() ; flags[IsStore] = false; flags[IsLoad] = false; - if (r2 == 31){ + if (r2 == 31) { isXZR = true; } } diff --git a/src/arch/arm/isa/templates/misc.isa b/src/arch/arm/isa/templates/misc.isa index e31146593..f653401b8 100644 --- a/src/arch/arm/isa/templates/misc.isa +++ b/src/arch/arm/isa/templates/misc.isa @@ -38,18 +38,16 @@ def template MrsDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template MrsConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -65,23 +63,21 @@ class %(class_name)s : public %(base_class)s { protected: uint8_t byteMask; - bool r; + bool r; public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - uint8_t _sysM, bool _r); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + uint8_t _sysM, bool _r); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template MrsBankedRegConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - uint8_t _sysM, - bool _r) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest), - byteMask(_sysM), r(_r) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + uint8_t _sysM, bool _r) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest), + byteMask(_sysM), r(_r) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -99,20 +95,18 @@ class %(class_name)s : public %(base_class)s bool r; public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, - uint8_t _sysM, bool _r); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, + uint8_t _sysM, bool _r); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template MsrBankedRegConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _op1, - uint8_t _sysM, - bool _r) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _sysM), - r(_r) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _op1, + uint8_t _sysM, bool _r) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _sysM), + r(_r) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -126,19 +120,17 @@ def template MsrBankedRegConstructor {{ def template MsrRegDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, uint8_t mask); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, uint8_t mask); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template MsrRegConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _op1, - uint8_t mask) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, mask) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _op1, + uint8_t mask) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, mask) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -152,19 +144,17 @@ def template MsrRegConstructor {{ def template MsrImmDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, uint32_t imm, uint8_t mask); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, uint32_t imm, uint8_t mask); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template MsrImmConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - uint32_t imm, - uint8_t mask) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, imm, mask) + %(class_name)s::%(class_name)s(ExtMachInst machInst, uint32_t imm, + uint8_t mask) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, imm, mask) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -178,23 +168,20 @@ def template MsrImmConstructor {{ def template MrrcOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, MiscRegIndex _op1, - IntRegIndex _dest, IntRegIndex _dest2, uint32_t imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, MiscRegIndex _op1, + IntRegIndex _dest, IntRegIndex _dest2, uint32_t imm); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template MrrcOpConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - MiscRegIndex op1, - IntRegIndex dest, - IntRegIndex dest2, - uint32_t imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, op1, dest, - dest2, imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, MiscRegIndex op1, + IntRegIndex dest, IntRegIndex dest2, + uint32_t imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, op1, dest, + dest2, imm) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -208,23 +195,20 @@ def template MrrcOpConstructor {{ def template McrrOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _op2, - MiscRegIndex _dest, uint32_t imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _op2, + MiscRegIndex _dest, uint32_t imm); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template McrrOpConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex op1, - IntRegIndex op2, - MiscRegIndex dest, - uint32_t imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, op1, op2, - dest, imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex op1, + IntRegIndex op2, MiscRegIndex dest, + uint32_t imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, op1, op2, + dest, imm) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -238,17 +222,16 @@ def template McrrOpConstructor {{ def template ImmOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, uint64_t _imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, uint64_t _imm); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template ImmOpConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -262,18 +245,17 @@ def template ImmOpConstructor {{ def template RegImmOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint64_t _imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint64_t _imm); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template RegImmOpConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _imm) + IntRegIndex _dest, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _imm) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -287,19 +269,17 @@ def template RegImmOpConstructor {{ def template RegRegOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template RegRegOpConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1) + IntRegIndex _dest, IntRegIndex _op1) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -313,24 +293,20 @@ def template RegRegOpConstructor {{ def template RegRegRegImmOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, - uint64_t _imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, uint64_t _imm); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template RegRegRegImmOpConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - IntRegIndex _op2, - uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _imm) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -344,24 +320,20 @@ def template RegRegRegImmOpConstructor {{ def template RegRegRegRegOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, - IntRegIndex _op2, IntRegIndex _op3); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, IntRegIndex _op3); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template RegRegRegRegOpConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - IntRegIndex _op2, - IntRegIndex _op3) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _op3) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + IntRegIndex _op3) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _op3) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -375,22 +347,19 @@ def template RegRegRegRegOpConstructor {{ def template RegRegRegOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template RegRegRegOpConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - IntRegIndex _op2) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -404,23 +373,19 @@ def template RegRegRegOpConstructor {{ def template RegRegImmOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, - uint64_t _imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1, + uint64_t _imm); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template RegRegImmOpConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -434,23 +399,19 @@ def template RegRegImmOpConstructor {{ def template MiscRegRegImmOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - MiscRegIndex _dest, IntRegIndex _op1, - uint64_t _imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, MiscRegIndex _dest, IntRegIndex _op1, + uint64_t _imm); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template MiscRegRegImmOpConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - MiscRegIndex _dest, - IntRegIndex _op1, - uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, MiscRegIndex _dest, + IntRegIndex _op1, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -464,23 +425,19 @@ def template MiscRegRegImmOpConstructor {{ def template RegMiscRegImmOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, MiscRegIndex _op1, - uint64_t _imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, MiscRegIndex _op1, + uint64_t _imm); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template RegMiscRegImmOpConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - MiscRegIndex _op1, - uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + MiscRegIndex _op1, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -494,22 +451,19 @@ def template RegMiscRegImmOpConstructor {{ def template RegImmImmOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, uint64_t _imm1, uint64_t _imm2); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + uint64_t _imm1, uint64_t _imm2); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template RegImmImmOpConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - uint64_t _imm1, - uint64_t _imm2) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _imm1, _imm2) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + uint64_t _imm1, uint64_t _imm2) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _imm1, _imm2) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -523,24 +477,20 @@ def template RegImmImmOpConstructor {{ def template RegRegImmImmOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, - uint64_t _imm1, uint64_t _imm2); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1, + uint64_t _imm1, uint64_t _imm2); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template RegRegImmImmOpConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - uint64_t _imm1, - uint64_t _imm2) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _imm1, _imm2) + IntRegIndex _dest, IntRegIndex _op1, + uint64_t _imm1, uint64_t _imm2) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm1, _imm2) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -554,22 +504,19 @@ def template RegRegImmImmOpConstructor {{ def template RegImmRegOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + uint64_t _imm, IntRegIndex _op1); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template RegImmRegOpConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - uint64_t _imm, - IntRegIndex _op1) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _imm, _op1) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + uint64_t _imm, IntRegIndex _op1) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _imm, _op1) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -583,25 +530,22 @@ def template RegImmRegOpConstructor {{ def template RegImmRegShiftOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1, - int32_t _shiftAmt, ArmShiftType _shiftType); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint64_t _imm, + IntRegIndex _op1, int32_t _shiftAmt, + ArmShiftType _shiftType); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template RegImmRegShiftOpConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - uint64_t _imm, - IntRegIndex _op1, - int32_t _shiftAmt, - ArmShiftType _shiftType) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _imm, _op1, _shiftAmt, _shiftType) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + uint64_t _imm, IntRegIndex _op1, + int32_t _shiftAmt, + ArmShiftType _shiftType) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _imm, _op1, _shiftAmt, _shiftType) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -615,22 +559,21 @@ def template RegImmRegShiftOpConstructor {{ def template MiscRegRegImmMemOpDeclare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - MiscRegIndex _dest, IntRegIndex _op1, - uint64_t _imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; - Fault initiateAcc(ExecContext *, Trace::InstRecord *) const override; - Fault completeAcc(PacketPtr, ExecContext *, - Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, MiscRegIndex _dest, + IntRegIndex _op1, uint64_t _imm); + Fault execute(ExecContext *, Trace::InstRecord *) const override; + Fault initiateAcc(ExecContext *, Trace::InstRecord *) const override; + Fault completeAcc(PacketPtr, ExecContext *, + Trace::InstRecord *) const override; }; }}; def template Mcr15Execute {{ - Fault %(class_name)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -659,8 +602,9 @@ def template Mcr15Execute {{ }}; def template Mcr15InitiateAcc {{ - Fault %(class_name)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -689,9 +633,9 @@ def template Mcr15InitiateAcc {{ }}; def template Mcr15CompleteAcc {{ - Fault %(class_name)s::completeAcc(PacketPtr pkt, - ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, + Trace::InstRecord *traceData) const { return NoFault; } diff --git a/src/arch/arm/isa/templates/misc64.isa b/src/arch/arm/isa/templates/misc64.isa index 7a384947e..df7733d9d 100644 --- a/src/arch/arm/isa/templates/misc64.isa +++ b/src/arch/arm/isa/templates/misc64.isa @@ -38,18 +38,17 @@ def template ImmOp64Declare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst,uint64_t _imm); + public: + // Constructor + %(class_name)s(ExtMachInst machInst,uint64_t _imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template ImmOp64Constructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm) { %(constructor)s; } @@ -58,24 +57,21 @@ def template ImmOp64Constructor {{ def template RegRegImmImmOp64Declare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, - uint64_t _imm1, uint64_t _imm2); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, + IntRegIndex _dest, IntRegIndex _op1, + uint64_t _imm1, uint64_t _imm2); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template RegRegImmImmOp64Constructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - uint64_t _imm1, - uint64_t _imm2) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _imm1, _imm2) + IntRegIndex _dest, IntRegIndex _op1, + uint64_t _imm1, uint64_t _imm2) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm1, _imm2) { %(constructor)s; } @@ -84,24 +80,20 @@ def template RegRegImmImmOp64Constructor {{ def template RegRegRegImmOp64Declare {{ class %(class_name)s : public %(base_class)s { - protected: - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, - IntRegIndex _op2, uint64_t _imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1, + IntRegIndex _op2, uint64_t _imm); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template RegRegRegImmOp64Constructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - IntRegIndex _op2, - uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _imm) { %(constructor)s; } @@ -110,21 +102,18 @@ def template RegRegRegImmOp64Constructor {{ def template MiscRegOp64Declare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, MiscRegIndex _dest, - uint64_t _imm); + public: + // Constructor + %(class_name)s(ExtMachInst machInst, MiscRegIndex _dest, uint64_t _imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template MiscRegOp64Constructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - MiscRegIndex _dest, - uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, MiscRegIndex _dest, + uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _imm) { %(constructor)s; } @@ -133,22 +122,20 @@ def template MiscRegOp64Constructor {{ def template MiscRegRegOp64Declare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, MiscRegIndex _dest, - IntRegIndex _op1, uint64_t _imm); + public: + // Constructor + %(class_name)s(ExtMachInst machInst, MiscRegIndex _dest, + IntRegIndex _op1, uint64_t _imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template MiscRegRegOp64Constructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - MiscRegIndex _dest, - IntRegIndex _op1, - uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, MiscRegIndex _dest, + IntRegIndex _op1, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm) { %(constructor)s; } @@ -157,22 +144,20 @@ def template MiscRegRegOp64Constructor {{ def template RegMiscRegOp64Declare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - MiscRegIndex _op1, uint64_t _imm); + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + MiscRegIndex _op1, uint64_t _imm); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template RegMiscRegOp64Constructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - MiscRegIndex _op1, - uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + MiscRegIndex _op1, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm) { %(constructor)s; } @@ -181,22 +166,20 @@ def template RegMiscRegOp64Constructor {{ def template XPauthOpRegRegDeclare {{ class %(class_name)s : public %(base_class)s { - private: - bool data; + private: + bool data; - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template XPauthOpRegRegConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest) { - data = bits(machInst, 10); %(constructor)s; } @@ -205,17 +188,17 @@ def template XPauthOpRegRegConstructor {{ def template RegNoneDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest); + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest); - Fault execute(ExecContext *, Trace::InstRecord *) const; + Fault execute(ExecContext *, Trace::InstRecord *) const; }; }}; def template RegNoneConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest) { %(constructor)s; } diff --git a/src/arch/arm/isa/templates/mult.isa b/src/arch/arm/isa/templates/mult.isa index 8ecef6a2f..79cc40fa4 100644 --- a/src/arch/arm/isa/templates/mult.isa +++ b/src/arch/arm/isa/templates/mult.isa @@ -38,21 +38,19 @@ def template Mult3Declare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _reg0, - IntRegIndex _reg1, IntRegIndex _reg2); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _reg0, + IntRegIndex _reg1, IntRegIndex _reg2); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template Mult3Constructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _reg0, - IntRegIndex _reg1, - IntRegIndex _reg2) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _reg0, _reg1, _reg2) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _reg0, + IntRegIndex _reg1, IntRegIndex _reg2) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _reg0, _reg1, _reg2) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -66,23 +64,21 @@ def template Mult3Constructor {{ def template Mult4Declare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _reg0, IntRegIndex _reg1, - IntRegIndex _reg2, IntRegIndex _reg3); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, + IntRegIndex _reg0, IntRegIndex _reg1, + IntRegIndex _reg2, IntRegIndex _reg3); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template Mult4Constructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _reg0, - IntRegIndex _reg1, - IntRegIndex _reg2, - IntRegIndex _reg3) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _reg0, _reg1, _reg2, _reg3) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _reg0, + IntRegIndex _reg1, IntRegIndex _reg2, + IntRegIndex _reg3) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _reg0, _reg1, _reg2, _reg3) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { diff --git a/src/arch/arm/isa/templates/neon.isa b/src/arch/arm/isa/templates/neon.isa index 5191daa2f..33e37b7b9 100644 --- a/src/arch/arm/isa/templates/neon.isa +++ b/src/arch/arm/isa/templates/neon.isa @@ -54,12 +54,13 @@ class %(class_name)s : public %(base_class)s { protected: typedef _Element Element; + public: // Constructor %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2) + IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -79,13 +80,14 @@ class %(class_name)s : public %(base_class)s { protected: typedef _Element Element; + public: // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, - uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _imm) + uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _imm) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -105,12 +107,13 @@ class %(class_name)s : public %(base_class)s { protected: typedef _Element Element; + public: // Constructor %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _imm) + IntRegIndex _dest, IntRegIndex _op1, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -130,10 +133,11 @@ class %(class_name)s : public %(base_class)s { protected: typedef _Element Element; + public: // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _imm) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _imm) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -153,12 +157,13 @@ class %(class_name)s : public %(base_class)s { protected: typedef _Element Element; + public: // Constructor %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1) + IntRegIndex _dest, IntRegIndex _op1) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -206,7 +211,8 @@ output header {{ def template NeonEqualRegExecute {{ template - Fault %(class_name)s::execute(ExecContext *xc, + Fault + %(class_name)s::execute(ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -217,21 +223,21 @@ def template NeonEqualRegExecute {{ const unsigned eCount = rCount * sizeof(uint32_t) / sizeof(Element); const unsigned eCountFull = 4 * sizeof(uint32_t) / sizeof(Element); - union RegVect { + union RegVect + { uint32_t regs[rCount]; Element elements[eCount]; }; - union FullRegVect { + union FullRegVect + { uint32_t regs[4]; Element elements[eCountFull]; }; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { %(code)s; - if (fault == NoFault) - { + if (fault == NoFault) { %(op_wb)s; } } else { @@ -244,7 +250,7 @@ def template NeonEqualRegExecute {{ output header {{ template - struct bigger_type_t; + struct bigger_type_t; template<> struct bigger_type_t { typedef uint16_t type; }; template<> struct bigger_type_t { typedef uint32_t type; }; @@ -257,7 +263,8 @@ output header {{ def template NeonUnequalRegExecute {{ template - Fault %(class_name)s::execute(ExecContext *xc, + Fault + %(class_name)s::execute(ExecContext *xc, Trace::InstRecord *traceData) const { typedef typename bigger_type_t::type BigElement; @@ -268,22 +275,22 @@ def template NeonUnequalRegExecute {{ const unsigned rCount = %(r_count)d; const unsigned eCount = rCount * sizeof(uint32_t) / sizeof(Element); - union RegVect { + union RegVect + { uint32_t regs[rCount]; Element elements[eCount]; BigElement bigElements[eCount / 2]; }; - union BigRegVect { + union BigRegVect + { uint32_t regs[2 * rCount]; BigElement elements[eCount]; }; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { %(code)s; - if (fault == NoFault) - { + if (fault == NoFault) { %(op_wb)s; } } else { diff --git a/src/arch/arm/isa/templates/neon64.isa b/src/arch/arm/isa/templates/neon64.isa index d281c95c8..ef353b933 100644 --- a/src/arch/arm/isa/templates/neon64.isa +++ b/src/arch/arm/isa/templates/neon64.isa @@ -45,12 +45,13 @@ class %(class_name)s : public %(base_class)s { protected: typedef _Element Element; + public: // Constructor %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2) + IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2) { %(constructor)s; } @@ -65,13 +66,14 @@ class %(class_name)s : public %(base_class)s { protected: typedef _Element Element; + public: // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, - uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _imm) + uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _imm) { %(constructor)s; } @@ -86,12 +88,11 @@ class %(class_name)s : public %(base_class)s { protected: typedef _Element Element; + public: // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1) { %(constructor)s; } @@ -106,12 +107,13 @@ class %(class_name)s : public %(base_class)s { protected: typedef _Element Element; + public: // Constructor %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _imm) + IntRegIndex _dest, IntRegIndex _op1, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm) { %(constructor)s; } @@ -126,13 +128,14 @@ class %(class_name)s : public %(base_class)s { protected: typedef _Element Element; + public: // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1, uint64_t _imm1, - uint64_t _imm2) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _imm1, _imm2) + uint64_t _imm2) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm1, _imm2) { %(constructor)s; } @@ -147,12 +150,11 @@ class %(class_name)s : public %(base_class)s { protected: typedef _Element Element; + public: // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _imm) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _imm) { %(constructor)s; } @@ -169,7 +171,8 @@ def template NeonXExecDeclare {{ def template NeonXEqualRegOpExecute {{ template - Fault %(class_name)s::execute(ExecContext *xc, + Fault + %(class_name)s::execute(ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -180,19 +183,20 @@ def template NeonXEqualRegOpExecute {{ const unsigned eCount = rCount * sizeof(uint32_t) / sizeof(Element); const unsigned eCountFull = 4 * sizeof(uint32_t) / sizeof(Element); - union RegVect { + union RegVect + { uint32_t regs[rCount]; Element elements[eCount]; }; - union FullRegVect { + union FullRegVect + { uint32_t regs[4]; Element elements[eCountFull]; }; %(code)s; - if (fault == NoFault) - { + if (fault == NoFault) { %(op_wb)s; } @@ -202,7 +206,8 @@ def template NeonXEqualRegOpExecute {{ def template NeonXUnequalRegOpExecute {{ template - Fault %(class_name)s::execute(ExecContext *xc, + Fault + %(class_name)s::execute(ExecContext *xc, Trace::InstRecord *traceData) const { typedef typename bigger_type_t::type BigElement; @@ -214,25 +219,27 @@ def template NeonXUnequalRegOpExecute {{ const unsigned eCount = rCount * sizeof(uint32_t) / sizeof(Element); const unsigned eCountFull = 4 * sizeof(uint32_t) / sizeof(Element); - union RegVect { + union RegVect + { uint32_t regs[rCount]; Element elements[eCount]; BigElement bigElements[eCount / 2]; }; - union BigRegVect { + union BigRegVect + { uint32_t regs[2 * rCount]; BigElement elements[eCount]; }; - union FullRegVect { + union FullRegVect + { uint32_t regs[4]; Element elements[eCountFull]; }; %(code)s; - if (fault == NoFault) - { + if (fault == NoFault) { %(op_wb)s; } @@ -255,8 +262,8 @@ def template MicroNeonMemDeclare64 {{ public: %(class_name)s(ExtMachInst machInst, RegIndex _dest, RegIndex _ura, uint32_t _imm, unsigned extraMemFlags, bool _baseIsSP, - uint8_t _accSize, uint8_t _eSize) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, + uint8_t _accSize, uint8_t _eSize) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _ura, _imm), baseIsSP(_baseIsSP), accSize(_accSize), eSize(_eSize) { @@ -272,8 +279,9 @@ def template MicroNeonMemDeclare64 {{ }}; def template NeonLoadExecute64 {{ - Fault %(class_name)s::execute( - ExecContext *xc, Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute( + ExecContext *xc, Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -302,7 +310,8 @@ def template NeonLoadExecute64 {{ }}; def template NeonLoadInitiateAcc64 {{ - Fault %(class_name)s::initiateAcc( + Fault + %(class_name)s::initiateAcc( ExecContext *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -314,8 +323,7 @@ def template NeonLoadInitiateAcc64 {{ %(ea_code)s; if (fault == NoFault) { - fault = initiateMemRead(xc, EA, accSize, - memAccessFlags, + fault = initiateMemRead(xc, EA, accSize, memAccessFlags, std::vector(accSize, true)); } @@ -324,7 +332,8 @@ def template NeonLoadInitiateAcc64 {{ }}; def template NeonLoadCompleteAcc64 {{ - Fault %(class_name)s::completeAcc( + Fault + %(class_name)s::completeAcc( PacketPtr pkt, ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -349,7 +358,8 @@ def template NeonLoadCompleteAcc64 {{ }}; def template NeonStoreExecute64 {{ - Fault %(class_name)s::execute( + Fault + %(class_name)s::execute( ExecContext *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -382,7 +392,8 @@ def template NeonStoreExecute64 {{ }}; def template NeonStoreInitiateAcc64 {{ - Fault %(class_name)s::initiateAcc( + Fault + %(class_name)s::initiateAcc( ExecContext *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -409,7 +420,8 @@ def template NeonStoreInitiateAcc64 {{ }}; def template NeonStoreCompleteAcc64 {{ - Fault %(class_name)s::completeAcc( + Fault + %(class_name)s::completeAcc( PacketPtr pkt, ExecContext *xc, Trace::InstRecord *traceData) const { return NoFault; @@ -435,7 +447,7 @@ def template VMemSingleDeclare64 {{ %(class_name)s(ExtMachInst machInst, RegIndex rn, RegIndex vd, RegIndex rm, uint8_t eSize, uint8_t dataSize, uint8_t numStructElems, uint8_t index, bool wb, - bool replicate = false); + bool replicate=false); }; }}; @@ -505,8 +517,9 @@ def template MicroNeonMixLaneDeclare64 {{ }}; def template MicroNeonMixExecute64 {{ - Fault %(class_name)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute( + ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; uint64_t resTemp = 0; @@ -515,8 +528,7 @@ def template MicroNeonMixExecute64 {{ %(op_rd)s; %(code)s; - if (fault == NoFault) - { + if (fault == NoFault) { %(op_wb)s; } diff --git a/src/arch/arm/isa/templates/pred.isa b/src/arch/arm/isa/templates/pred.isa index 3c770e93b..4f06edaf6 100644 --- a/src/arch/arm/isa/templates/pred.isa +++ b/src/arch/arm/isa/templates/pred.isa @@ -51,22 +51,20 @@ let {{ def template DataImmDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1, uint32_t _imm, bool _rotC=true); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, uint32_t _imm, bool _rotC=true); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template DataImmConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - uint32_t _imm, - bool _rotC) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _imm, _rotC) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, uint32_t _imm, + bool _rotC) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm, _rotC) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -89,24 +87,22 @@ def template DataImmConstructor {{ def template DataRegDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1, IntRegIndex _op2, - int32_t _shiftAmt, ArmShiftType _shiftType); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + int32_t _shiftAmt, ArmShiftType _shiftType); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template DataRegConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - IntRegIndex _op2, - int32_t _shiftAmt, - ArmShiftType _shiftType) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _shiftAmt, _shiftType) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + int32_t _shiftAmt, + ArmShiftType _shiftType) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _shiftAmt, _shiftType) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -115,7 +111,7 @@ def template DataRegConstructor {{ } } - if (%(is_branch)s && !isFloating() && !isVector()){ + if (%(is_branch)s && !isFloating() && !isVector()) { flags[IsControl] = true; flags[IsIndirectControl] = true; if (condCode == COND_AL || condCode == COND_UC) @@ -134,24 +130,22 @@ def template DataRegConstructor {{ def template DataRegRegDeclare {{ class %(class_name)s : public %(base_class)s { - public: - // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1, IntRegIndex _op2, IntRegIndex _shift, - ArmShiftType _shiftType); - Fault execute(ExecContext *, Trace::InstRecord *) const override; + public: + // Constructor + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, IntRegIndex _shift, + ArmShiftType _shiftType); + Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template DataRegRegConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - IntRegIndex _op2, - IntRegIndex _shift, - ArmShiftType _shiftType) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _shift, _shiftType) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + IntRegIndex _shift, + ArmShiftType _shiftType) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _shift, _shiftType) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -163,8 +157,9 @@ def template DataRegRegConstructor {{ }}; def template PredOpExecute {{ - Fault %(class_name)s::execute( - ExecContext *xc, Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute( + ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; uint64_t resTemp = 0; @@ -172,11 +167,9 @@ def template PredOpExecute {{ %(op_decl)s; %(op_rd)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { %(code)s; - if (fault == NoFault) - { + if (fault == NoFault) { %(op_wb)s; } } else { @@ -188,8 +181,9 @@ def template PredOpExecute {{ }}; def template QuiescePredOpExecute {{ - Fault %(class_name)s::execute( - ExecContext *xc, Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute( + ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; uint64_t resTemp = 0; @@ -197,11 +191,9 @@ def template QuiescePredOpExecute {{ %(op_decl)s; %(op_rd)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { %(code)s; - if (fault == NoFault) - { + if (fault == NoFault) { %(op_wb)s; } } else { @@ -215,8 +207,9 @@ def template QuiescePredOpExecute {{ }}; def template QuiescePredOpExecuteWithFixup {{ - Fault %(class_name)s::execute( - ExecContext *xc, Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute( + ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; uint64_t resTemp = 0; @@ -224,11 +217,9 @@ def template QuiescePredOpExecuteWithFixup {{ %(op_decl)s; %(op_rd)s; - if (%(predicate_test)s) - { + if (%(predicate_test)s) { %(code)s; - if (fault == NoFault) - { + if (fault == NoFault) { %(op_wb)s; } } else { diff --git a/src/arch/arm/isa/templates/semihost.isa b/src/arch/arm/isa/templates/semihost.isa index 7ec4e19a1..da5e332a1 100644 --- a/src/arch/arm/isa/templates/semihost.isa +++ b/src/arch/arm/isa/templates/semihost.isa @@ -48,8 +48,8 @@ // when a semihosting immediate is recognized. def template SemihostConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm) { %(constructor)s; if (!(condCode == COND_AL || condCode == COND_UC)) { @@ -71,8 +71,8 @@ def template SemihostConstructor {{ }}; def template SemihostConstructor64 {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm) + %(class_name)s::%(class_name)s(ExtMachInst machInst, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm) { %(constructor)s; diff --git a/src/arch/arm/isa/templates/sve.isa b/src/arch/arm/isa/templates/sve.isa index f460e0ec1..b4b68fb74 100644 --- a/src/arch/arm/isa/templates/sve.isa +++ b/src/arch/arm/isa/templates/sve.isa @@ -54,12 +54,13 @@ class %(class_name)s : public %(base_class)s typedef _DElement DElement; typedef _SElement TPSElem; typedef _DElement TPDElem; + public: // Constructor %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _gp) + IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _gp) { %(constructor)s; } @@ -75,12 +76,13 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _gp) + IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _gp) { %(constructor)s; } @@ -96,12 +98,11 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1) { %(constructor)s; } @@ -117,12 +118,12 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, %(isSimdFp)s) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, %(isSimdFp)s) { %(constructor)s; } @@ -138,12 +139,11 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _imm) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _imm) { %(constructor)s; } @@ -159,13 +159,14 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint64_t _imm, IntRegIndex _gp, - bool _isMerging = true) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _imm, _gp, _isMerging) + bool _isMerging=true) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _imm, _gp, _isMerging) { %(constructor)s; } @@ -202,12 +203,13 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, uint64_t _imm, IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _imm, _gp) + IntRegIndex _dest, uint64_t _imm, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _imm, _gp) { %(constructor)s; } @@ -223,12 +225,13 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op2, IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op2, _gp) + IntRegIndex _dest, IntRegIndex _op2, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op2, _gp) { %(constructor)s; } @@ -244,13 +247,14 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, - IntRegIndex _gp, SvePredType _predType) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _gp, _predType) + IntRegIndex _gp, SvePredType _predType) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _gp, _predType) { %(constructor)s; } @@ -266,12 +270,13 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2) + IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2) { %(constructor)s; } @@ -287,13 +292,13 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, - uint8_t _index) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _index) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, uint8_t _index) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _index) { %(constructor)s; } @@ -309,13 +314,14 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, - IntRegIndex _gp, bool _isSel = false) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _gp, _isSel) + IntRegIndex _gp, bool _isSel=false) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _gp, _isSel) { %(constructor)s; } @@ -331,13 +337,13 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, - IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _gp) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _gp) { %(constructor)s; } @@ -353,13 +359,13 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, - IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _gp, %(op2IsWide)s) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _gp, %(op2IsWide)s) { %(constructor)s; } @@ -375,13 +381,13 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, uint64_t _imm, - IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _imm, _gp) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, uint64_t _imm, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm, _gp) { %(constructor)s; } @@ -397,13 +403,13 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, - IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _gp) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _gp) { %(constructor)s; } @@ -419,12 +425,13 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _imm) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm) { %(constructor)s; } @@ -440,12 +447,13 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _gp) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _gp) { %(constructor)s; } @@ -467,10 +475,10 @@ class %(class_name)s : public %(base_class)s public: // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _gp) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _gp) { %(constructor)s; } @@ -486,12 +494,13 @@ class SveIndexII : public SveIndexIIOp protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor - SveIndexII(ExtMachInst machInst, - IntRegIndex _dest, int8_t _imm1, int8_t _imm2) - : SveIndexIIOp("%(mnemonic)s", machInst, %(op_class)s, - _dest, _imm1, _imm2) + SveIndexII(ExtMachInst machInst, IntRegIndex _dest, + int8_t _imm1, int8_t _imm2) : + SveIndexIIOp("%(mnemonic)s", machInst, %(op_class)s, + _dest, _imm1, _imm2) { %(constructor)s; } @@ -507,12 +516,13 @@ class SveIndexIR : public SveIndexIROp protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor - SveIndexIR(ExtMachInst machInst, - IntRegIndex _dest, int8_t _imm, IntRegIndex _op) - : SveIndexIROp("%(mnemonic)s", machInst, %(op_class)s, - _dest, _imm, _op) + SveIndexIR(ExtMachInst machInst, IntRegIndex _dest, + int8_t _imm, IntRegIndex _op) : + SveIndexIROp("%(mnemonic)s", machInst, %(op_class)s, + _dest, _imm, _op) { %(constructor)s; } @@ -528,12 +538,13 @@ class SveIndexRI : public SveIndexRIOp protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor - SveIndexRI(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op, int8_t _imm) - : SveIndexRIOp("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op, _imm) + SveIndexRI(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op, int8_t _imm) : + SveIndexRIOp("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op, _imm) { %(constructor)s; } @@ -549,12 +560,13 @@ class SveIndexRR : public SveIndexRROp protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor - SveIndexRR(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2) - : SveIndexRROp("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2) + SveIndexRR(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2) : + SveIndexRROp("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2) { %(constructor)s; } @@ -570,11 +582,11 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, %(srcIs32b)s, %(destIsVec)s) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, %(srcIs32b)s, %(destIsVec)s) { %(constructor)s; } @@ -590,11 +602,12 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1, IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _gp) + IntRegIndex _op1, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _gp) { %(constructor)s; } @@ -611,12 +624,11 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, uint8_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _imm) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint8_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _imm) { %(constructor)s; } @@ -632,13 +644,14 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _base, IntRegIndex _offset, - uint8_t _mult, SveAdrOffsetFormat _offsetFormat) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _base, _offset, _mult, _offsetFormat) + uint8_t _mult, SveAdrOffsetFormat _offsetFormat) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _base, _offset, _mult, _offsetFormat) { %(constructor)s; } @@ -654,11 +667,12 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1, IntRegIndex _op2) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, %(srcIs32b)s) + IntRegIndex _op1, IntRegIndex _op2) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, %(srcIs32b)s) { %(constructor)s; } @@ -674,9 +688,10 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: - %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _op2) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _op2) + %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _op2) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _op2) { %(constructor)s; } @@ -692,10 +707,11 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1, - int64_t _op2, IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1, + int64_t _op2, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1, _op2, _gp) { %(constructor)s; @@ -712,10 +728,11 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - uint8_t _pattern, uint8_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, + uint8_t _pattern, uint8_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _pattern, _imm, %(dstIsVec)s, %(dstIs32b)s) { %(constructor)s; @@ -731,8 +748,8 @@ class %(class_name)s : public %(base_class)s { public: %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _gp, - IntRegIndex _op1) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, + IntRegIndex _op1) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _gp, _op1, %(isMerging)s) { %(constructor)s; @@ -749,8 +766,8 @@ class %(class_name)s : public %(base_class)s { public: %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1, IntRegIndex _op2, IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, + IntRegIndex _op1, IntRegIndex _op2, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1, _op2, _gp) { %(constructor)s; @@ -767,10 +784,11 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, - IntRegIndex _op1, IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, + IntRegIndex _op1, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1, _gp, %(isCond)s, %(isScalar)s, %(isSimdFp)s) { %(constructor)s; @@ -791,11 +809,10 @@ class %(class_name)s : public %(base_class)s typedef _DElement DElement; typedef _SElement TPSElem; typedef _DElement TPDElem; + public: - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1) { %(constructor)s; } @@ -808,8 +825,8 @@ def template SvePredicateTestOpDeclare {{ class %(class_name)s : public %(base_class)s { public: - %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _gp) + %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _gp) { %(constructor)s; } @@ -822,8 +839,8 @@ def template SvePredUnaryOpWImplicitSrcDeclare {{ class %(class_name)s : public %(base_class)s { public: - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest) { %(constructor)s; } @@ -836,8 +853,8 @@ def template SvePredUnaryPredOpWImplicitSrcDeclare {{ class %(class_name)s : public %(base_class)s { public: - %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _gp) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _gp) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _gp) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _gp) { %(constructor)s; } @@ -850,8 +867,8 @@ def template SvePredUnaryOpWImplicitDstDeclare {{ class %(class_name)s : public %(base_class)s { public: - %(class_name)s(ExtMachInst machInst, IntRegIndex _op1) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1) + %(class_name)s(ExtMachInst machInst, IntRegIndex _op1) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1) { %(constructor)s; } @@ -864,8 +881,8 @@ def template SveOpWImplicitSrcDstDeclare {{ class %(class_name)s : public %(base_class)s { public: - %(class_name)s(ExtMachInst machInst) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s) + %(class_name)s(ExtMachInst machInst) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s) { %(constructor)s; } @@ -886,11 +903,10 @@ class %(class_name)s : public %(base_class)s typedef _DElement TPDElem; public: - %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, - uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _imm) + %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _imm) { %(constructor)s; esize = sizeof(Element); @@ -913,9 +929,9 @@ class %(class_name)s : public %(base_class)s public: %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2) + IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2) { %(constructor)s; esize = sizeof(Element); @@ -932,13 +948,14 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, - IntRegIndex _gp, uint8_t _rot) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _gp, _rot) + IntRegIndex _gp, uint8_t _rot) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _gp, _rot) { %(constructor)s; } @@ -954,13 +971,14 @@ class %(class_name)s : public %(base_class)s protected: typedef _Element Element; typedef _Element TPElem; + public: // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, - uint8_t _rot, uint8_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _rot, _imm) + uint8_t _rot, uint8_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _rot, _imm) { %(constructor)s; } @@ -971,7 +989,8 @@ class %(class_name)s : public %(base_class)s def template SveWideningOpExecute {{ template - Fault %(class_name)s::execute(ExecContext *xc, + Fault + %(class_name)s::execute(ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -979,8 +998,7 @@ def template SveWideningOpExecute {{ %(op_rd)s; %(code)s; - if (fault == NoFault) - { + if (fault == NoFault) { %(op_wb)s; } @@ -989,7 +1007,8 @@ def template SveWideningOpExecute {{ }}; def template SveNonTemplatedOpExecute {{ - Fault %(class_name)s::execute(ExecContext *xc, + Fault + %(class_name)s::execute(ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -997,8 +1016,7 @@ def template SveNonTemplatedOpExecute {{ %(op_rd)s; %(code)s; - if (fault == NoFault) - { + if (fault == NoFault) { %(op_wb)s; } @@ -1008,7 +1026,8 @@ def template SveNonTemplatedOpExecute {{ def template SveOpExecute {{ template - Fault %(class_name)s::execute(ExecContext *xc, + Fault + %(class_name)s::execute(ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -1016,8 +1035,7 @@ def template SveOpExecute {{ %(op_rd)s; %(code)s; - if (fault == NoFault) - { + if (fault == NoFault) { %(op_wb)s; } diff --git a/src/arch/arm/isa/templates/sve_mem.isa b/src/arch/arm/isa/templates/sve_mem.isa index 8913afde7..829f025c4 100644 --- a/src/arch/arm/isa/templates/sve_mem.isa +++ b/src/arch/arm/isa/templates/sve_mem.isa @@ -43,8 +43,8 @@ def template SveMemFillSpillOpDeclare {{ public: %(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _base, uint64_t _imm) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + IntRegIndex _dest, IntRegIndex _base, uint64_t _imm) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _base, _imm) { %(constructor)s; @@ -72,10 +72,10 @@ def template SveContigMemSSOpDeclare {{ public: %(class_name)s(const char* mnem, ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, - IntRegIndex _offset) - : %(base_class)s(mnem, machInst, %(op_class)s, - _dest, _gp, _base, _offset) + IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, + IntRegIndex _offset) : + %(base_class)s(mnem, machInst, %(op_class)s, + _dest, _gp, _base, _offset) { %(constructor)s; } @@ -85,8 +85,9 @@ def template SveContigMemSSOpDeclare {{ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const override; - virtual void - annotateFault(ArmISA::ArmFault *fault) override { + void + annotateFault(ArmISA::ArmFault *fault) override + { %(fa_code)s } }; @@ -101,10 +102,10 @@ def template SveContigMemSIOpDeclare {{ public: %(class_name)s(const char* mnem, ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, - uint64_t _imm) - : %(base_class)s(mnem, machInst, %(op_class)s, - _dest, _gp, _base, _imm) + IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, + uint64_t _imm) : + %(base_class)s(mnem, machInst, %(op_class)s, + _dest, _gp, _base, _imm) { %(constructor)s; } @@ -114,8 +115,9 @@ def template SveContigMemSIOpDeclare {{ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const override; - virtual void - annotateFault(ArmISA::ArmFault *fault) override { + void + annotateFault(ArmISA::ArmFault *fault) override + { %(fa_code)s } }; @@ -137,14 +139,15 @@ def template SveContigMemExecDeclare {{ def template SveContigLoadExecute {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; M5_VAR_USED bool aarch64 = true; - unsigned eCount = ArmStaticInst::getCurSveVecLen( - xc->tcBase()); + unsigned eCount = + ArmStaticInst::getCurSveVecLen(xc->tcBase()); %(op_decl)s; %(op_rd)s; @@ -171,14 +174,15 @@ def template SveContigLoadExecute {{ def template SveContigLoadInitiateAcc {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; M5_VAR_USED bool aarch64 = true; - unsigned eCount = ArmStaticInst::getCurSveVecLen( - xc->tcBase()); + unsigned eCount = + ArmStaticInst::getCurSveVecLen(xc->tcBase()); %(op_src_decl)s; %(op_rd)s; @@ -197,12 +201,13 @@ def template SveContigLoadInitiateAcc {{ def template SveContigLoadCompleteAcc {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::completeAcc(PacketPtr pkt, - ExecContext *xc, Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::completeAcc(PacketPtr pkt, + ExecContext *xc, Trace::InstRecord *traceData) const { M5_VAR_USED bool aarch64 = true; - unsigned eCount = ArmStaticInst::getCurSveVecLen( - xc->tcBase()); + unsigned eCount = + ArmStaticInst::getCurSveVecLen(xc->tcBase()); %(op_decl)s; %(op_rd)s; @@ -224,14 +229,15 @@ def template SveContigLoadCompleteAcc {{ def template SveContigStoreExecute {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; M5_VAR_USED bool aarch64 = true; - unsigned eCount = ArmStaticInst::getCurSveVecLen( - xc->tcBase()); + unsigned eCount = + ArmStaticInst::getCurSveVecLen(xc->tcBase()); %(op_decl)s; %(op_rd)s; @@ -248,7 +254,7 @@ def template SveContigStoreExecute {{ if (fault == NoFault) { fault = writeMemAtomic(xc, memData.raw_ptr(), - EA, memAccessSize, this->memAccessFlags, NULL, wrEn); + EA, memAccessSize, this->memAccessFlags, nullptr, wrEn); } if (fault == NoFault) { @@ -261,14 +267,15 @@ def template SveContigStoreExecute {{ def template SveContigStoreInitiateAcc {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; M5_VAR_USED bool aarch64 = true; - unsigned eCount = ArmStaticInst::getCurSveVecLen( - xc->tcBase()); + unsigned eCount = + ArmStaticInst::getCurSveVecLen(xc->tcBase()); %(op_decl)s; %(op_rd)s; @@ -285,7 +292,7 @@ def template SveContigStoreInitiateAcc {{ if (fault == NoFault) { fault = writeMemTiming(xc, memData.raw_ptr(), - EA, memAccessSize, this->memAccessFlags, NULL, wrEn); + EA, memAccessSize, this->memAccessFlags, nullptr, wrEn); } return fault; @@ -294,8 +301,9 @@ def template SveContigStoreInitiateAcc {{ def template SveContigStoreCompleteAcc {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::completeAcc(PacketPtr pkt, - ExecContext *xc, Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::completeAcc(PacketPtr pkt, + ExecContext *xc, Trace::InstRecord *traceData) const { return NoFault; } @@ -303,14 +311,15 @@ def template SveContigStoreCompleteAcc {{ def template SveLoadAndReplExecute {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; M5_VAR_USED bool aarch64 = true; - unsigned eCount = ArmStaticInst::getCurSveVecLen( - xc->tcBase()); + unsigned eCount = + ArmStaticInst::getCurSveVecLen(xc->tcBase()); %(op_decl)s; %(op_rd)s; @@ -334,8 +343,9 @@ def template SveLoadAndReplExecute {{ def template SveLoadAndReplInitiateAcc {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -359,13 +369,14 @@ def template SveLoadAndReplInitiateAcc {{ def template SveLoadAndReplCompleteAcc {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::completeAcc(PacketPtr pkt, - ExecContext *xc, Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::completeAcc(PacketPtr pkt, + ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; M5_VAR_USED bool aarch64 = true; - unsigned eCount = ArmStaticInst::getCurSveVecLen( - xc->tcBase()); + unsigned eCount = + ArmStaticInst::getCurSveVecLen(xc->tcBase()); %(op_decl)s; %(op_rd)s; @@ -405,14 +416,14 @@ def template SveIndexedMemVIMicroopDeclare {{ public: %(class_name)s(const char* mnem, ExtMachInst machInst, - OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, - IntRegIndex _base, uint64_t _imm, int _elemIndex, int _numElems, - bool _firstFault) - : %(base_class)s(mnem, machInst, %(op_class)s), - dest(_dest), gp(_gp), base(_base), imm(_imm), - elemIndex(_elemIndex), numElems(_numElems), - firstFault(_firstFault), - memAccessFlags(ArmISA::TLB::AllowUnaligned) + OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, + IntRegIndex _base, uint64_t _imm, int _elemIndex, + int _numElems, bool _firstFault) : + %(base_class)s(mnem, machInst, %(op_class)s), + dest(_dest), gp(_gp), base(_base), imm(_imm), + elemIndex(_elemIndex), numElems(_numElems), + firstFault(_firstFault), + memAccessFlags(ArmISA::TLB::AllowUnaligned) { %(constructor)s; if (_opClass == MemReadOp && elemIndex == 0) { @@ -432,7 +443,7 @@ def template SveIndexedMemVIMicroopDeclare {{ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const override; - virtual void + void annotateFault(ArmISA::ArmFault *fault) override { %(fa_code)s @@ -487,16 +498,16 @@ def template SveIndexedMemSVMicroopDeclare {{ public: %(class_name)s(const char* mnem, ExtMachInst machInst, - OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, - IntRegIndex _base, IntRegIndex _offset, bool _offsetIs32, - bool _offsetIsSigned, bool _offsetIsScaled, int _elemIndex, - int _numElems, bool _firstFault) - : %(base_class)s(mnem, machInst, %(op_class)s), - dest(_dest), gp(_gp), base(_base), offset(_offset), - offsetIs32(_offsetIs32), offsetIsSigned(_offsetIsSigned), - offsetIsScaled(_offsetIsScaled), elemIndex(_elemIndex), - numElems(_numElems), firstFault(_firstFault), - memAccessFlags(ArmISA::TLB::AllowUnaligned) + OpClass __opClass, IntRegIndex _dest, IntRegIndex _gp, + IntRegIndex _base, IntRegIndex _offset, bool _offsetIs32, + bool _offsetIsSigned, bool _offsetIsScaled, int _elemIndex, + int _numElems, bool _firstFault) : + %(base_class)s(mnem, machInst, %(op_class)s), + dest(_dest), gp(_gp), base(_base), offset(_offset), + offsetIs32(_offsetIs32), offsetIsSigned(_offsetIsSigned), + offsetIsScaled(_offsetIsScaled), elemIndex(_elemIndex), + numElems(_numElems), firstFault(_firstFault), + memAccessFlags(ArmISA::TLB::AllowUnaligned) { %(constructor)s; if (_opClass == MemReadOp && elemIndex == 0) { @@ -516,7 +527,7 @@ def template SveIndexedMemSVMicroopDeclare {{ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const override; - virtual void + void annotateFault(ArmISA::ArmFault *fault) override { %(fa_code)s @@ -548,8 +559,9 @@ def template SveIndexedMemSVMicroopDeclare {{ def template SveGatherLoadMicroopExecute {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -596,8 +608,9 @@ def template SveGatherLoadMicroopExecute {{ def template SveGatherLoadMicroopInitiateAcc {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -612,13 +625,13 @@ def template SveGatherLoadMicroopInitiateAcc {{ int index = elemIndex; if (%(pred_check_code)s) { fault = initiateMemRead(xc, traceData, EA, memData, - this->memAccessFlags); + this->memAccessFlags); if (fault != NoFault) { %(fault_status_set_code)s; if (firstFault) { for (index = 0; index < numElems && !(%(pred_check_code)s); - index++); + index++) {} if (index < elemIndex) { fault = NoFault; xc->setMemAccPredicate(false); @@ -638,8 +651,9 @@ def template SveGatherLoadMicroopInitiateAcc {{ def template SveGatherLoadMicroopCompleteAcc {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::completeAcc(PacketPtr pkt, - ExecContext *xc, Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::completeAcc(PacketPtr pkt, + ExecContext *xc, Trace::InstRecord *traceData) const { M5_VAR_USED bool aarch64 = true; @@ -662,8 +676,9 @@ def template SveGatherLoadMicroopCompleteAcc {{ def template SveScatterStoreMicroopExecute {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -679,7 +694,7 @@ def template SveScatterStoreMicroopExecute {{ int index = elemIndex; if (%(pred_check_code)s) { fault = writeMemAtomicLE(xc, traceData, memData, EA, - this->memAccessFlags, NULL); + this->memAccessFlags, nullptr); } if (fault == NoFault) { @@ -692,8 +707,9 @@ def template SveScatterStoreMicroopExecute {{ def template SveScatterStoreMicroopInitiateAcc {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; @@ -709,7 +725,7 @@ def template SveScatterStoreMicroopInitiateAcc {{ int index = elemIndex; if (%(pred_check_code)s) { fault = writeMemTimingLE(xc, traceData, memData, EA, - this->memAccessFlags, NULL); + this->memAccessFlags, nullptr); } else { xc->setPredicate(false); } @@ -720,8 +736,9 @@ def template SveScatterStoreMicroopInitiateAcc {{ def template SveScatterStoreMicroopCompleteAcc {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::completeAcc(PacketPtr pkt, - ExecContext *xc, Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::completeAcc(PacketPtr pkt, + ExecContext *xc, Trace::InstRecord *traceData) const { return NoFault; } @@ -739,9 +756,9 @@ def template SveFirstFaultWritebackMicroopDeclare {{ public: SveFirstFaultWritebackMicroop(const char* mnem, ExtMachInst machInst, - OpClass __opClass, int _numElems, StaticInst *_macroOp) - : MicroOp(mnem, machInst, __opClass), - numElems(_numElems), macroOp(_macroOp) + OpClass __opClass, int _numElems, StaticInst *_macroOp) : + MicroOp(mnem, machInst, __opClass), + numElems(_numElems), macroOp(_macroOp) { %(constructor)s; } @@ -762,8 +779,9 @@ def template SveFirstFaultWritebackMicroopDeclare {{ def template SveFirstFaultWritebackMicroopExecute {{ %(tpl_header)s - Fault %(class_name)s%(tpl_args)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s%(tpl_args)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { M5_VAR_USED bool aarch64 = true; @@ -773,7 +791,7 @@ def template SveFirstFaultWritebackMicroopExecute {{ int index, firstFaultIndex; for (index = 0; index < numElems && !%(fault_status_check_code)s; - index++); + index++) {} firstFaultIndex = index; for (index = 0; index < numElems; index++) { if (index < firstFaultIndex) { @@ -796,8 +814,8 @@ def template SveGatherLoadCpySrcVecMicroopDeclare {{ public: SveGatherLoadCpySrcVecMicroop(const char* mnem, ExtMachInst machInst, - IntRegIndex _op1, StaticInst *_macroOp) - : MicroOp(mnem, machInst, SimdAluOp), op1(_op1), macroOp(_macroOp) + IntRegIndex _op1, StaticInst *_macroOp) : + MicroOp(mnem, machInst, SimdAluOp), op1(_op1), macroOp(_macroOp) { %(constructor)s; } @@ -817,7 +835,8 @@ def template SveGatherLoadCpySrcVecMicroopDeclare {{ }}; def template SveGatherLoadCpySrcVecMicroopExecute {{ - Fault SveGatherLoadCpySrcVecMicroop::execute(ExecContext *xc, + Fault + SveGatherLoadCpySrcVecMicroop::execute(ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -825,8 +844,7 @@ def template SveGatherLoadCpySrcVecMicroopExecute {{ %(op_rd)s; %(code)s; - if (fault == NoFault) - { + if (fault == NoFault) { %(op_wb)s; } @@ -856,12 +874,12 @@ def template SveStructMemSIMicroopDeclare {{ public: %(class_name)s(const char* mnem, ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, - int64_t _imm, uint8_t _numRegs, int _regIndex) - : %(base_class)s(mnem, machInst, %(op_class)s), - dest(_dest), gp(_gp), base(_base), imm(_imm), - numRegs(_numRegs), regIndex(_regIndex), - memAccessFlags(ArmISA::TLB::AllowUnaligned) + IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, + int64_t _imm, uint8_t _numRegs, int _regIndex) : + %(base_class)s(mnem, machInst, %(op_class)s), + dest(_dest), gp(_gp), base(_base), imm(_imm), + numRegs(_numRegs), regIndex(_regIndex), + memAccessFlags(ArmISA::TLB::AllowUnaligned) { %(constructor)s; baseIsSP = isSP(_base); @@ -872,7 +890,7 @@ def template SveStructMemSIMicroopDeclare {{ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const override; - virtual void + void annotateFault(ArmISA::ArmFault *fault) override { %(fa_code)s @@ -886,21 +904,21 @@ def template SveStructMemSIMicroopDeclare {{ printMnemonic(ss, "", false); ccprintf(ss, "{"); switch (dest) { - case INTRLVREG0: - ccprintf(ss, "INTRLV0"); - break; - case INTRLVREG1: - ccprintf(ss, "INTRLV1"); - break; - case INTRLVREG2: - ccprintf(ss, "INTRLV2"); - break; - case INTRLVREG3: - ccprintf(ss, "INTRLV3"); - break; - default: - printVecReg(ss, dest, true); - break; + case INTRLVREG0: + ccprintf(ss, "INTRLV0"); + break; + case INTRLVREG1: + ccprintf(ss, "INTRLV1"); + break; + case INTRLVREG2: + ccprintf(ss, "INTRLV2"); + break; + case INTRLVREG3: + ccprintf(ss, "INTRLV3"); + break; + default: + printVecReg(ss, dest, true); + break; } ccprintf(ss, "}, "); printVecPredReg(ss, gp); @@ -934,14 +952,15 @@ def template SveStructMemExecDeclare {{ def template SveStructLoadExecute {{ template - Fault %(class_name)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; M5_VAR_USED bool aarch64 = true; - unsigned eCount = ArmStaticInst::getCurSveVecLen( - xc->tcBase()); + unsigned eCount = + ArmStaticInst::getCurSveVecLen(xc->tcBase()); %(op_decl)s; %(op_rd)s; @@ -967,14 +986,15 @@ def template SveStructLoadExecute {{ def template SveStructLoadInitiateAcc {{ template - Fault %(class_name)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; M5_VAR_USED bool aarch64 = true; - unsigned eCount = ArmStaticInst::getCurSveVecLen( - xc->tcBase()); + unsigned eCount = + ArmStaticInst::getCurSveVecLen(xc->tcBase()); %(op_src_decl)s; %(op_rd)s; @@ -993,13 +1013,14 @@ def template SveStructLoadInitiateAcc {{ def template SveStructLoadCompleteAcc {{ template - Fault %(class_name)s::completeAcc(PacketPtr pkt, - ExecContext *xc, Trace::InstRecord *traceData) const + Fault + %(class_name)s::completeAcc(PacketPtr pkt, + ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; M5_VAR_USED bool aarch64 = true; - unsigned eCount = ArmStaticInst::getCurSveVecLen( - xc->tcBase()); + unsigned eCount = + ArmStaticInst::getCurSveVecLen(xc->tcBase()); %(op_decl)s; %(op_rd)s; @@ -1008,7 +1029,7 @@ def template SveStructLoadCompleteAcc {{ auto memDataView = memData.as(); memcpy(memData.raw_ptr(), pkt->getPtr(), - pkt->getSize()); + pkt->getSize()); if (fault == NoFault) { %(memacc_code)s; @@ -1024,14 +1045,15 @@ def template SveStructLoadCompleteAcc {{ def template SveStructStoreExecute {{ template - Fault %(class_name)s::execute(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::execute(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; M5_VAR_USED bool aarch64 = true; - unsigned eCount = ArmStaticInst::getCurSveVecLen( - xc->tcBase()); + unsigned eCount = + ArmStaticInst::getCurSveVecLen(xc->tcBase()); %(op_decl)s; %(op_rd)s; @@ -1048,7 +1070,7 @@ def template SveStructStoreExecute {{ if (fault == NoFault) { fault = writeMemAtomic(xc, memData.raw_ptr(), - EA, memAccessSize, this->memAccessFlags, NULL, wrEn); + EA, memAccessSize, this->memAccessFlags, nullptr, wrEn); } if (fault == NoFault) { @@ -1061,14 +1083,15 @@ def template SveStructStoreExecute {{ def template SveStructStoreInitiateAcc {{ template - Fault %(class_name)s::initiateAcc(ExecContext *xc, - Trace::InstRecord *traceData) const + Fault + %(class_name)s::initiateAcc(ExecContext *xc, + Trace::InstRecord *traceData) const { Addr EA; Fault fault = NoFault; M5_VAR_USED bool aarch64 = true; - unsigned eCount = ArmStaticInst::getCurSveVecLen( - xc->tcBase()); + unsigned eCount = + ArmStaticInst::getCurSveVecLen(xc->tcBase()); %(op_decl)s; %(op_rd)s; @@ -1085,7 +1108,7 @@ def template SveStructStoreInitiateAcc {{ if (fault == NoFault) { fault = writeMemTiming(xc, memData.raw_ptr(), - EA, memAccessSize, this->memAccessFlags, NULL, wrEn); + EA, memAccessSize, this->memAccessFlags, nullptr, wrEn); } return fault; @@ -1094,8 +1117,9 @@ def template SveStructStoreInitiateAcc {{ def template SveStructStoreCompleteAcc {{ template - Fault %(class_name)s::completeAcc(PacketPtr pkt, - ExecContext *xc, Trace::InstRecord *traceData) const + Fault + %(class_name)s::completeAcc(PacketPtr pkt, + ExecContext *xc, Trace::InstRecord *traceData) const { return NoFault; } @@ -1123,12 +1147,12 @@ def template SveStructMemSSMicroopDeclare {{ public: %(class_name)s(const char* mnem, ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, - IntRegIndex _offset, uint8_t _numRegs, int _regIndex) - : %(base_class)s(mnem, machInst, %(op_class)s), - dest(_dest), gp(_gp), base(_base), offset(_offset), - numRegs(_numRegs), regIndex(_regIndex), - memAccessFlags(ArmISA::TLB::AllowUnaligned) + IntRegIndex _dest, IntRegIndex _gp, IntRegIndex _base, + IntRegIndex _offset, uint8_t _numRegs, int _regIndex) : + %(base_class)s(mnem, machInst, %(op_class)s), + dest(_dest), gp(_gp), base(_base), offset(_offset), + numRegs(_numRegs), regIndex(_regIndex), + memAccessFlags(ArmISA::TLB::AllowUnaligned) { %(constructor)s; baseIsSP = isSP(_base); @@ -1139,7 +1163,7 @@ def template SveStructMemSSMicroopDeclare {{ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const override; - virtual void + void annotateFault(ArmISA::ArmFault *fault) override { %(fa_code)s @@ -1153,21 +1177,21 @@ def template SveStructMemSSMicroopDeclare {{ printMnemonic(ss, "", false); ccprintf(ss, "{"); switch (dest) { - case INTRLVREG0: - ccprintf(ss, "INTRLV0"); - break; - case INTRLVREG1: - ccprintf(ss, "INTRLV1"); - break; - case INTRLVREG2: - ccprintf(ss, "INTRLV2"); - break; - case INTRLVREG3: - ccprintf(ss, "INTRLV3"); - break; - default: - printVecReg(ss, dest, true); - break; + case INTRLVREG0: + ccprintf(ss, "INTRLV0"); + break; + case INTRLVREG1: + ccprintf(ss, "INTRLV1"); + break; + case INTRLVREG2: + ccprintf(ss, "INTRLV2"); + break; + case INTRLVREG3: + ccprintf(ss, "INTRLV3"); + break; + default: + printVecReg(ss, dest, true); + break; } ccprintf(ss, "}, "); printVecPredReg(ss, gp); @@ -1200,11 +1224,10 @@ def template SveIntrlvMicroopDeclare {{ public: %(class_name)s(const char* mnem, ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, - uint8_t _numRegs, int _regIndex, StaticInst *_macroOp) - : MicroOp(mnem, machInst, SimdAluOp), - dest(_dest), op1(_op1), numRegs(_numRegs), regIndex(_regIndex), - macroOp(_macroOp) + IntRegIndex _dest, IntRegIndex _op1, + uint8_t _numRegs, int _regIndex, StaticInst *_macroOp) : + MicroOp(mnem, machInst, SimdAluOp), dest(_dest), op1(_op1), + numRegs(_numRegs), regIndex(_regIndex), macroOp(_macroOp) { %(constructor)s; } @@ -1238,11 +1261,10 @@ def template SveDeIntrlvMicroopDeclare {{ public: %(class_name)s(const char* mnem, ExtMachInst machInst, - IntRegIndex _dest, uint8_t _numRegs, int _regIndex, - StaticInst *_macroOp) - : MicroOp(mnem, machInst, SimdAluOp), - dest(_dest), numRegs(_numRegs), regIndex(_regIndex), - macroOp(_macroOp) + IntRegIndex _dest, uint8_t _numRegs, int _regIndex, + StaticInst *_macroOp) : + MicroOp(mnem, machInst, SimdAluOp), dest(_dest), + numRegs(_numRegs), regIndex(_regIndex), macroOp(_macroOp) { %(constructor)s; } @@ -1269,7 +1291,8 @@ def template SveIntrlvMicroopExecDeclare {{ def template SveIntrlvMicroopExecute {{ template - Fault %(class_name)s::execute(ExecContext *xc, + Fault + %(class_name)s::execute(ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -1277,8 +1300,7 @@ def template SveIntrlvMicroopExecute {{ %(op_rd)s; %(code)s; - if (fault == NoFault) - { + if (fault == NoFault) { %(op_wb)s; } diff --git a/src/arch/arm/isa/templates/vfp64.isa b/src/arch/arm/isa/templates/vfp64.isa index 671c629e6..4ffb42ff0 100644 --- a/src/arch/arm/isa/templates/vfp64.isa +++ b/src/arch/arm/isa/templates/vfp64.isa @@ -37,9 +37,9 @@ def template AA64FpRegRegOpConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, IntRegIndex _op1, - VfpMicroMode mode) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + IntRegIndex _dest, IntRegIndex _op1, + VfpMicroMode mode) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1, mode) { %(constructor)s; @@ -48,8 +48,8 @@ def template AA64FpRegRegOpConstructor {{ def template AA64FpRegImmOpConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, uint64_t _imm, VfpMicroMode mode) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + IntRegIndex _dest, uint64_t _imm, VfpMicroMode mode) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _imm, mode) { %(constructor)s; @@ -57,26 +57,22 @@ def template AA64FpRegImmOpConstructor {{ }}; def template AA64FpRegRegImmOpConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - uint64_t _imm, - VfpMicroMode mode) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _imm, mode) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, uint64_t _imm, + VfpMicroMode mode) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm, mode) { %(constructor)s; } }}; def template AA64FpRegRegRegOpConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - IntRegIndex _op2, - VfpMicroMode mode) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, mode) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + VfpMicroMode mode) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, mode) { %(constructor)s; } @@ -89,20 +85,17 @@ class %(class_name)s : public %(base_class)s // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, - IntRegIndex _op3, VfpMicroMode mode = VfpNotAMicroop); + IntRegIndex _op3, VfpMicroMode mode=VfpNotAMicroop); Fault execute(ExecContext *, Trace::InstRecord *) const override; }; }}; def template AA64FpRegRegRegRegOpConstructor {{ - %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex _dest, - IntRegIndex _op1, - IntRegIndex _op2, - IntRegIndex _op3, - VfpMicroMode mode) - : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, - _dest, _op1, _op2, _op3, mode) + %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, + IntRegIndex _op1, IntRegIndex _op2, + IntRegIndex _op3, VfpMicroMode mode) : + %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _op2, _op3, mode) { %(constructor)s; } -- 2.30.2