From cc14973786538d535f3289a5d3626f67cb4275ef Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 13 Oct 2022 01:29:54 +0100 Subject: [PATCH] --- openpower/sv/svp64.mdwn | 2 -- 1 file changed, 2 deletions(-) diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn index c1bb830c7..2ee6bfea5 100644 --- a/openpower/sv/svp64.mdwn +++ b/openpower/sv/svp64.mdwn @@ -418,8 +418,6 @@ is based on whether the number of src operands is 2 or 3. With only * `RM-1P-3S1D` Single Predication dest/src1/2/3, applies to 4-operand instructions (fmadd, isel, madd). * `RM-1P-2S1D` Single Predication dest/src1/2 applies to 3-operand instructions (src1 src2 dest) * `RM-2P-1S1D` Twin Predication (src=1, dest=1) -* `RM-2P-1S1D-PU` Twin Predication (src=1, dest=1) with Pack/Unpack, - primarily for LDST (Immediate)' mv and swizzle mv * `RM-2P-2S1D` Twin Predication (src=2, dest=1) primarily for LDST (Indexed) * `RM-2P-1S2D` Twin Predication (src=1, dest=2) primarily for LDST Update -- 2.30.2