From cc36a670f7286d12e924dcf273259a511a96b3a7 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 28 Feb 2002 18:39:38 -0800 Subject: [PATCH] * g++.dg/opt/vtgc1.C: Adjust patterns for ia64. From-SVN: r50179 --- gcc/testsuite/ChangeLog | 18 +++++++++++------- gcc/testsuite/g++.dg/opt/vtgc1.C | 29 ++++++++++++++++------------- 2 files changed, 27 insertions(+), 20 deletions(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 469bbddd798..8071038f8a5 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2002-02-28 Richard Henderson + + * g++.dg/opt/vtgc1.C: Adjust patterns for ia64. + 2002-02-27 Hans-Peter Nilsson * gcc.c-torture/execute/20020227-1.c: New test. @@ -85,7 +89,7 @@ 2002-02-21 Aldy Hernandez - * gcc.dg/attr-alwaysinline.c: New. + * gcc.dg/attr-alwaysinline.c: New. 2002-02-21 Jakub Jelinek @@ -162,7 +166,7 @@ 2002-02-13 Stan Shebs - * gcc.dg/altivec-3.c: New. + * gcc.dg/altivec-3.c: New. 2002-02-12 Jakub Jelinek @@ -268,13 +272,13 @@ 2002-02-06 Nick Clifton * g++.dg/ext/align1.C: Do not use an explicit alignment value - as certain file formats cannot support particularly large - alignments. + as certain file formats cannot support particularly large + alignments. * g++.dg/warn/weak1.C: Expect a warning from COFF toolchains, and do not expect to be able to link the executable. - * g++.old-deja/g++.ext/attrib5.C: Expect the compilation to + * g++.old-deja/g++.ext/attrib5.C: Expect the compilation to fail because the COFF format does not support the weak attribute. 2002-02-05 David Billinghurst @@ -283,8 +287,8 @@ 2002-02-05 Aldy Hernandez - * gcc.dg/altivec-4.c: AltiVec builtin predicates changed format. - Fix testcase accordingly. + * gcc.dg/altivec-4.c: AltiVec builtin predicates changed format. + Fix testcase accordingly. 2002-02-04 Richard Henderson diff --git a/gcc/testsuite/g++.dg/opt/vtgc1.C b/gcc/testsuite/g++.dg/opt/vtgc1.C index c50855529bb..511d45b36e7 100644 --- a/gcc/testsuite/g++.dg/opt/vtgc1.C +++ b/gcc/testsuite/g++.dg/opt/vtgc1.C @@ -118,16 +118,19 @@ void x3 (Multivs1 *ii) { ii->f2();} void x4 (Multiss2 *ii) { ii->f2();} void x5 (Multivv3 *ii) { ii->f2();} -// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Multivv3, 0" } } -// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*VTT for Multivv3, 0" } } -// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Multiss2, vtable for Base2" } } -// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Multivs1, vtable for Base2" } } -// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*VTT for Multivs1, vtable for Base2" } } -// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Multisv0, vtable for Side0" } } -// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*VTT for Multisv0, vtable for Side0" } } -// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Side0, 0" } } -// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for VbasedA, 0" } } -// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*VTT for VbasedA, 0" } } -// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Base2, vtable for Base1" } } -// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Base1, vtable for Base0" } } -// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Base0, 0" } } +// Use .* because of ia64's convention of marking symbols with "#", which +// makes it through the c++filt. + +// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Multivv3.*0" } } +// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*VTT for Multivv3.*0" } } +// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Multiss2.*vtable for Base2" } } +// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Multivs1.*vtable for Base2" } } +// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*VTT for Multivs1.*vtable for Base2" } } +// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Multisv0.*vtable for Side0" } } +// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*VTT for Multisv0.*vtable for Side0" } } +// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Side0.*0" } } +// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for VbasedA.*0" } } +// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*VTT for VbasedA.*0" } } +// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Base2.*vtable for Base1" } } +// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Base1.*vtable for Base0" } } +// { dg-final { scan-assembler-dem "\.vtable_inherit\[ \t\]*vtable for Base0.*0" } } -- 2.30.2