From cc4defc12c7e36137786d122e2f60bef48e575f9 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 14 Nov 2019 13:43:50 +0000 Subject: [PATCH] aarch64: Add "c" constraint Mirror arm in letting "c" match the condition code register. * config/aarch64/constraints.md (c): New constraint. From-SVN: r278223 --- gcc/ChangeLog | 4 ++++ gcc/config/aarch64/constraints.md | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c96683b1d1b..ea547f7cf40 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2019-11-14 Richard Henderson + + * config/aarch64/constraints.md (c): New constraint. + 2019-11-14 Jan Hubicka * ipa-fnsummary.c (ipa_call_context::estimate_size_and_time, diff --git a/gcc/config/aarch64/constraints.md b/gcc/config/aarch64/constraints.md index d0c3dd5bc1f..b9e5d13e851 100644 --- a/gcc/config/aarch64/constraints.md +++ b/gcc/config/aarch64/constraints.md @@ -39,6 +39,10 @@ (define_register_constraint "y" "FP_LO8_REGS" "Floating point and SIMD vector registers V0 - V7.") +(define_constraint "c" + "@internal The condition code register." + (match_operand 0 "cc_register")) + (define_constraint "I" "A constant that can be used with an ADD operation." (and (match_code "const_int") -- 2.30.2