From cc8a9e789344dd84943e79d813b1a01f178960c5 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Sat, 11 Jan 2020 12:16:21 +1100 Subject: [PATCH] Upper 32 bits of XER should read as 0s From the architecture: bits 0:31 and 35:43 are treated as reserved and return 0s when read using mfxer Signed-off-by: Anton Blanchard --- execute1.vhdl | 2 ++ 1 file changed, 2 insertions(+) diff --git a/execute1.vhdl b/execute1.vhdl index 421bccb..4986c71 100644 --- a/execute1.vhdl +++ b/execute1.vhdl @@ -401,6 +401,8 @@ begin if is_fast_spr(e_in.read_reg1) then result := e_in.read_data1; if decode_spr_num(e_in.insn) = SPR_XER then + -- bits 0:31 and 35:43 are treated as reserved and return 0s when read using mfxer + result(63 downto 32) := (others => '0'); result(63-32) := v.e.xerc.so; result(63-33) := v.e.xerc.ov; result(63-34) := v.e.xerc.ca; -- 2.30.2