From cca18f3bd5e146516dc92c8a4940d0cfebeae08c Mon Sep 17 00:00:00 2001 From: Claudiu Zissulescu Date: Wed, 6 Nov 2019 14:31:07 +0100 Subject: [PATCH] [ARC] Cleanup sign/zero extend patterns Clean up sign/zero extend patterns. gcc/ xxxx-xx-xx Claudiu Zissulescu * config/arc/arc.md (zero_extendqihi2_i): Cleanup pattern. (zero_extendqisi2_ac): Likewise. (zero_extendhisi2_i): Likewise. (extendqihi2_i): Likewise. (extendqisi2_ac): Likewise. (extendhisi2_i): Likewise. From-SVN: r277883 --- gcc/ChangeLog | 9 ++++ gcc/config/arc/arc.md | 105 ++++++++++++++++++++++-------------------- 2 files changed, 65 insertions(+), 49 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bc3d23842a4..0162a7f61f9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2019-11-06 Claudiu Zissulescu + + * config/arc/arc.md (zero_extendqihi2_i): Cleanup pattern. + (zero_extendqisi2_ac): Likewise. + (zero_extendhisi2_i): Likewise. + (extendqihi2_i): Likewise. + (extendqisi2_ac): Likewise. + (extendhisi2_i): Likewise. + 2019-11-06 Richard Biener * tree-vect-loop.c (vectorizable_reduction): Remember reduction diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index 7cd47338ec2..67932c4e3a0 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -1801,18 +1801,22 @@ core_3, archs4x, archs4xd, archs4xd_slow" [(set_attr "type" "cmove,cmove") (set_attr "length" "8,16")]) +;; ------------------------------------------------------------------- +;; Sign/Zero extension +;; ------------------------------------------------------------------- (define_insn "*zero_extendqihi2_i" - [(set (match_operand:HI 0 "dest_reg_operand" "=Rcq,Rcq#q,Rcw,w,r,r") - (zero_extend:HI (match_operand:QI 1 "nonvol_nonimm_operand" "0,Rcq#q,0,c,Ucm,m")))] + [(set (match_operand:HI 0 "dest_reg_operand" "=q,q,r,r,r,r") + (zero_extend:HI + (match_operand:QI 1 "nonvol_nonimm_operand" "0,q,0,r,Ucm,m")))] "" "@ - extb%? %0,%1%& - extb%? %0,%1%& - bmsk%? %0,%1,7 - extb %0,%1 - xldb%U1 %0,%1 - ldb%U1 %0,%1" + extb%?\\t%0,%1 + extb%?\\t%0,%1 + bmsk%?\\t%0,%1,7 + extb\\t%0,%1 + xldb%U1\\t%0,%1 + ldb%U1\\t%0,%1" [(set_attr "type" "unary,unary,unary,unary,load,load") (set_attr "iscompact" "maybe,true,false,false,false,false") (set_attr "predicable" "no,no,yes,no,no,no")]) @@ -1825,18 +1829,19 @@ core_3, archs4x, archs4xd, archs4xd_slow" ) (define_insn "*zero_extendqisi2_ac" - [(set (match_operand:SI 0 "dest_reg_operand" "=Rcq,Rcq#q,Rcw,w,qRcq,!*x,r,r") - (zero_extend:SI (match_operand:QI 1 "nonvol_nonimm_operand" "0,Rcq#q,0,c,T,Usd,Ucm,m")))] + [(set (match_operand:SI 0 "dest_reg_operand" "=q,q,r,r,q,!*x,r,r") + (zero_extend:SI + (match_operand:QI 1 "nonvol_nonimm_operand" "0,q,0,r,T,Usd,Ucm,m")))] "" "@ - extb%? %0,%1%& - extb%? %0,%1%& - bmsk%? %0,%1,7 - extb %0,%1 - ldb%? %0,%1%& - ldb%? %0,%1%& - xldb%U1 %0,%1 - ldb%U1 %0,%1" + extb%?\\t%0,%1 + extb%?\\t%0,%1 + bmsk%?\\t%0,%1,7 + extb\\t%0,%1 + ldb%?\\t%0,%1 + ldb%?\\t%0,%1 + xldb%U1\\t%0,%1 + ldb%U1\\t%0,%1" [(set_attr "type" "unary,unary,unary,unary,load,load,load,load") (set_attr "iscompact" "maybe,true,false,false,true,true,false,false") (set_attr "predicable" "no,no,yes,no,no,no,no,no")]) @@ -1849,23 +1854,23 @@ core_3, archs4x, archs4xd, archs4xd_slow" ) (define_insn "*zero_extendhisi2_i" - [(set (match_operand:SI 0 "dest_reg_operand" "=Rcq,q,Rcw,w,!x,Rcqq,r,r") - (zero_extend:SI (match_operand:HI 1 "nonvol_nonimm_operand" "0,q,0,c,Usd,T,Ucm,m")))] + [(set (match_operand:SI 0 "dest_reg_operand" "=q,q,r,r,!x,q,r,r") + (zero_extend:SI + (match_operand:HI 1 "nonvol_nonimm_operand" "0,q,0,r,Usd,T,Ucm,m")))] "" "@ - ext%_%? %0,%1%& - ext%_%? %0,%1%& - bmsk%? %0,%1,15 - ext%_ %0,%1 - ld%_%? %0,%1 - ld%_%? %0,%1 - * return TARGET_EM ? \"xldh%U1%V1 %0,%1\" : \"xldw%U1 %0,%1\"; - ld%_%U1%V1 %0,%1" + ext%_%?\\t%0,%1 + ext%_%?\\t%0,%1 + bmsk%?\\t%0,%1,15 + ext%_\\t%0,%1 + ld%_%?\\t%0,%1 + ld%_%?\\t%0,%1 + xldw%U1\\t%0,%1 + ld%_%U1%V1\\t%0,%1" [(set_attr "type" "unary,unary,unary,unary,load,load,load,load") (set_attr "iscompact" "maybe,true,false,false,true,true,false,false") (set_attr "predicable" "no,no,yes,no,no,no,no,no")]) - (define_expand "zero_extendhisi2" [(set (match_operand:SI 0 "dest_reg_operand" "") (zero_extend:SI (match_operand:HI 1 "nonvol_nonimm_operand" "")))] @@ -1876,19 +1881,19 @@ core_3, archs4x, archs4xd, archs4xd_slow" ;; Sign extension instructions. (define_insn "*extendqihi2_i" - [(set (match_operand:HI 0 "dest_reg_operand" "=Rcqq,r,r,r") - (sign_extend:HI (match_operand:QI 1 "nonvol_nonimm_operand" "Rcqq,r,Uex,m")))] + [(set (match_operand:HI 0 "dest_reg_operand" "=q,r,r,r") + (sign_extend:HI + (match_operand:QI 1 "nonvol_nonimm_operand" "q,r,Uex,m")))] "" "@ - sexb%? %0,%1%& - sexb %0,%1 - ldb.x%U1 %0,%1 - ldb.x%U1 %0,%1" + sexb%?\\t%0,%1 + sexb\\t%0,%1 + ldb.x%U1\\t%0,%1 + ldb.x%U1\\t%0,%1" [(set_attr "type" "unary,unary,load,load") (set_attr "iscompact" "true,false,false,false") (set_attr "length" "*,*,*,8")]) - (define_expand "extendqihi2" [(set (match_operand:HI 0 "dest_reg_operand" "") (sign_extend:HI (match_operand:QI 1 "nonvol_nonimm_operand" "")))] @@ -1897,14 +1902,15 @@ core_3, archs4x, archs4xd, archs4xd_slow" ) (define_insn "*extendqisi2_ac" - [(set (match_operand:SI 0 "dest_reg_operand" "=Rcqq,w,r,r") - (sign_extend:SI (match_operand:QI 1 "nonvol_nonimm_operand" "Rcqq,c,Uex,m")))] + [(set (match_operand:SI 0 "dest_reg_operand" "=q,r,r,r") + (sign_extend:SI + (match_operand:QI 1 "nonvol_nonimm_operand" "q,r,Uex,m")))] "" "@ - sexb%? %0,%1%& - sexb %0,%1 - ldb.x%U1 %0,%1 - ldb.x%U1 %0,%1" + sexb%?\\t%0,%1 + sexb\\t%0,%1 + ldb.x%U1\\t%0,%1 + ldb.x%U1\\t%0,%1" [(set_attr "type" "unary,unary,load,load") (set_attr "iscompact" "true,false,false,false") (set_attr "length" "*,*,*,8")]) @@ -1917,15 +1923,16 @@ core_3, archs4x, archs4xd, archs4xd_slow" ) (define_insn "*extendhisi2_i" - [(set (match_operand:SI 0 "dest_reg_operand" "=Rcqq,w,Rcqq,r,r") - (sign_extend:SI (match_operand:HI 1 "nonvol_nonimm_operand" "Rcqq,c,Ucd,Uex,m")))] + [(set (match_operand:SI 0 "dest_reg_operand" "=q,r,q,r,r") + (sign_extend:SI + (match_operand:HI 1 "nonvol_nonimm_operand" "q,r,Ucd,Uex,m")))] "" "@ - sex%_%? %0,%1%& - sex%_ %0,%1 - ldh%?.x %0,%1%& - ld%_.x%U1%V1 %0,%1 - ld%_.x%U1%V1 %0,%1" + sex%_%?\\t%0,%1 + sex%_\\t%0,%1 + ldh%?.x\\t%0,%1%& + ld%_.x%U1%V1\\t%0,%1 + ld%_.x%U1%V1\\t%0,%1" [(set_attr "type" "unary,unary,load,load,load") (set_attr "iscompact" "true,false,true,false,false") (set_attr "length" "*,*,*,4,8")]) -- 2.30.2