From cd23cdb1743b41baed0b937c4b359b9422490ca7 Mon Sep 17 00:00:00 2001 From: Will Schmidt Date: Mon, 17 Feb 2020 10:22:38 -0600 Subject: [PATCH] Fix existing fold-vec-extract-longlong.p8.c testcase The code generated by this test changed shortly after this test was committed, and we didn't get back to updating the scan-assembler statements to match. Until now. [testsuite] * gcc.target/powerpc/fold-vec-extract-longlong.p8.c: Correct number of expected insns. --- gcc/testsuite/ChangeLog | 5 ++++ .../powerpc/fold-vec-extract-longlong.p8.c | 27 ++++++++++--------- 2 files changed, 19 insertions(+), 13 deletions(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0de8adf70e3..12390746bd5 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2020-02-17 Will Schmidt + + * gcc.target/powerpc/fold-vec-extract-longlong.p8.c: Correct + number of expected insns. + 2020-02-17 Martin Liska PR ipa/93760 diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c index e8aabd07199..2784d80dabe 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c @@ -5,25 +5,26 @@ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O2" } */ -// targeting P8, both LE and BE. six tests. +// Targeting P8LE and P8BE, six tests total. // P8 (LE) constants: mfvsrd -// P8 (LE) variables: xori, rldic, mtvsrd, xxpermdi, vslo, mfvsrd -// P8 (BE) constants: xxpermdi, mfvsrd -// P8 (BE) Variables: rldic, mtvsrd, xxpermdi, vslo, mfvsrd +// P8 (LE) variables: addi,xxpermdi,mr,stxvd2x|stxvd4x,rldicl,sldi,ldx,blr +// P8 (BE) constants: mfvsrd +// P8 (BE) Variables: addi,xxpermdi,rldicl,mr,stxvd2x|stxvd4x,sldi,ldx,blr -/* results. */ -/* { dg-final { scan-assembler-times {\mxori\M} 3 { target le } } } */ -/* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */ -/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxvw4x\M} 4 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 3 { target lp64 } } } */ /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlwz\M} 11 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\mmfvsrd\M} 6 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\mmtvsrd\M} 3 { target lp64 } } } */ /* { dg-final { scan-assembler-times {\mxxpermdi\M} 3 { target le } } } */ -/* { dg-final { scan-assembler-times {\mxxpermdi\M} 6 { target { be && lp64 } } } } */ /* { dg-final { scan-assembler-times {\mxxpermdi\M} 2 { target { be && ilp32 } } } } */ -/* { dg-final { scan-assembler-times {\mvslo\M} 3 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {\mxxpermdi\M} 3 { target { be && lp64 } } } } */ +/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxvw4x\M} 3 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxvw4x\M} 4 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mrldicl\M|\mrldic\M|\mrlwinm\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mmfvsrd\M} 3 { target { lp64 } } } } */ +/* { dg-final { scan-assembler-times {\mmfvsrd\M} 0 { target { be && ilp32 } } } } */ +/* { dg-final { scan-assembler-times {\mmtvsrd\M} 0 { target { lp64 } } } } */ +/* { dg-final { scan-assembler-times {\mmtvsrd\M} 0 { target { be && ilp32 } } } } */ #include -- 2.30.2