From cd423de1caffbeae01a0a126217ed527db583b55 Mon Sep 17 00:00:00 2001 From: Dmitry Selyutin Date: Tue, 11 Apr 2023 21:27:24 +0300 Subject: [PATCH] ppc/svp64: support shadd/shadduw instructions --- gas/testsuite/gas/ppc/ppc.exp | 1 + gas/testsuite/gas/ppc/shadd.d | 24 ++++++++++++++++++++++++ gas/testsuite/gas/ppc/shadd.s | 16 ++++++++++++++++ opcodes/ppc-opc.c | 6 ++++++ 4 files changed, 47 insertions(+) create mode 100644 gas/testsuite/gas/ppc/shadd.d create mode 100644 gas/testsuite/gas/ppc/shadd.s diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp index db9d31f6283..cf37c381220 100644 --- a/gas/testsuite/gas/ppc/ppc.exp +++ b/gas/testsuite/gas/ppc/ppc.exp @@ -171,3 +171,4 @@ run_dump_test "bmask" run_dump_test "fptrans" run_dump_test "maddedu" run_dump_test "divmod2du" +run_dump_test "shadd" diff --git a/gas/testsuite/gas/ppc/shadd.d b/gas/testsuite/gas/ppc/shadd.d new file mode 100644 index 00000000000..ea8daffe13d --- /dev/null +++ b/gas/testsuite/gas/ppc/shadd.d @@ -0,0 +1,24 @@ +#as: -mlibresoc +#objdump: -dr -Mlibresoc + +.*: file format .* + + +Disassembly of section \.text: +0+ <\.text>: +.*:\s+(5b e0 00 dc|dc 00 e0 5b)\s+shadd\s+r31,r0,r0,0 +.*:\s+(58 1f 00 dc|dc 00 1f 58)\s+shadd\s+r0,r31,r0,0 +.*:\s+(58 00 f8 dc|dc f8 00 58)\s+shadd\s+r0,r0,r31,0 +.*:\s+(58 00 06 dc|dc 06 00 58)\s+shadd\s+r0,r0,r0,3 +.*:\s+(5b e0 00 dd|dd 00 e0 5b)\s+shadd.\s+r31,r0,r0,0 +.*:\s+(58 1f 00 dd|dd 00 1f 58)\s+shadd.\s+r0,r31,r0,0 +.*:\s+(58 00 f8 dd|dd f8 00 58)\s+shadd.\s+r0,r0,r31,0 +.*:\s+(58 00 06 dd|dd 06 00 58)\s+shadd.\s+r0,r0,r0,3 +.*:\s+(5b e0 01 dc|dc 01 e0 5b)\s+shadduw\s+r31,r0,r0,0 +.*:\s+(58 1f 01 dc|dc 01 1f 58)\s+shadduw\s+r0,r31,r0,0 +.*:\s+(58 00 f9 dc|dc f9 00 58)\s+shadduw\s+r0,r0,r31,0 +.*:\s+(58 00 07 dc|dc 07 00 58)\s+shadduw\s+r0,r0,r0,3 +.*:\s+(5b e0 01 dd|dd 01 e0 5b)\s+shadduw.\s+r31,r0,r0,0 +.*:\s+(58 1f 01 dd|dd 01 1f 58)\s+shadduw.\s+r0,r31,r0,0 +.*:\s+(58 00 f9 dd|dd f9 00 58)\s+shadduw.\s+r0,r0,r31,0 +.*:\s+(58 00 07 dd|dd 07 00 58)\s+shadduw.\s+r0,r0,r0,3 diff --git a/gas/testsuite/gas/ppc/shadd.s b/gas/testsuite/gas/ppc/shadd.s new file mode 100644 index 00000000000..e415c0f0756 --- /dev/null +++ b/gas/testsuite/gas/ppc/shadd.s @@ -0,0 +1,16 @@ +shadd 31,0,0,0 +shadd 0,31,0,0 +shadd 0,0,31,0 +shadd 0,0,0,3 +shadd. 31,0,0,0 +shadd. 0,31,0,0 +shadd. 0,0,31,0 +shadd. 0,0,0,3 +shadduw 31,0,0,0 +shadduw 0,31,0,0 +shadduw 0,0,31,0 +shadduw 0,0,0,3 +shadduw. 31,0,0,0 +shadduw. 0,31,0,0 +shadduw. 0,0,31,0 +shadduw. 0,0,0,3 diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index 7fa8866df2e..00ae28f8d4f 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -3795,6 +3795,7 @@ const struct powerpc_operand powerpc_operands[] = #define RMC A_L + 1 #define CY RMC #define ew RMC +#define sm RMC { 0x3, 9, NULL, NULL, 0 }, #define R RMC + 1 @@ -7047,6 +7048,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"svremap", SVRM(22,57), SVRM_MASK, SVP64, PPCVLE, {SVme, mi0, mi1, mi2, mo0, mo1, pst}}, +{"shadd", ZRC(22,110,0), Z2_MASK, SVP64, PPCVLE, {RT, RA, RB, sm}}, +{"shadd.", ZRC(22,110,1), Z2_MASK, SVP64, PPCVLE, {RT, RA, RB, sm}}, +{"shadduw", ZRC(22,238,0), Z2_MASK, SVP64, PPCVLE, {RT, RA, RB, sm}}, +{"shadduw.", ZRC(22,238,1), Z2_MASK, SVP64, PPCVLE, {RT, RA, RB, sm}}, + {"minu", XRC(22,78,0), X_MASK, SVP64, PPCVLE, {RT, RA, RB}}, {"minu.", XRC(22,78,1), X_MASK, SVP64, PPCVLE, {RT, RA, RB}}, {"maxu", XRC(22,206,0), X_MASK, SVP64, PPCVLE, {RT, RA, RB}}, -- 2.30.2