From cd6cb1ec19617824a70a043b7064c3a060ff1ad7 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Sat, 19 Dec 2020 15:37:31 +0000
Subject: [PATCH]

---
 openpower/sv/setvl.mdwn | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/openpower/sv/setvl.mdwn b/openpower/sv/setvl.mdwn
index 94df7128b..17aaf6518 100644
--- a/openpower/sv/setvl.mdwn
+++ b/openpower/sv/setvl.mdwn
@@ -45,7 +45,8 @@ Note that setmvli is a pseudo-op, based on RA/RT=0, and setvli likewise
            VL = vlimmed
        }
     } else {
-       // VL not to change, source from SPR
+       // VL not to change (except if MVL is reduced)
+       // read from SPRs
        VL = SPR[SV_VL]
     }
 
@@ -54,6 +55,7 @@ Note that setmvli is a pseudo-op, based on RA/RT=0, and setvli likewise
     if ms {
        MVL = vlimmed
     } else {
+       // MVL not to change, read from SPRs
        MVL = SPR[SV_MVL]
     }
 
@@ -72,7 +74,9 @@ Note that setmvli is a pseudo-op, based on RA/RT=0, and setvli likewise
     // write CR?
     if Rc {
         // update CR from VL (not rt)
-        CR0 = ....
+        CR0.eq = (VL == 0)
+        ...
+        ...
     }
 
 # Examples
-- 
2.30.2