From cd88d1a171bf4493ddd5590c8a294543f14f19d5 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Wed, 27 Apr 2016 19:14:35 +0200 Subject: [PATCH] nvc0/ir: add emission for OP_SULEA Signed-off-by: Samuel Pitoiset Reviewed-by: Ilia Mirkin --- .../nouveau/codegen/nv50_ir_emit_nvc0.cpp | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp index 14f4be4eed9..f7bdc19cfdc 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp @@ -63,6 +63,8 @@ private: void emitInterpMode(const Instruction *); void emitLoadStoreType(DataType ty); void emitSUGType(DataType); + void emitSUAddr(const TexInstruction *); + void emitSUDim(const TexInstruction *); void emitCachingMode(CacheMode c); void emitShortSrc2(const ValueRef&); @@ -137,6 +139,8 @@ private: void emitSULDGB(const TexInstruction *); void emitSUSTGx(const TexInstruction *); + void emitSULEA(const TexInstruction *); + void emitVSHL(const Instruction *); void emitVectorSubOp(const Instruction *); @@ -2284,6 +2288,57 @@ CodeEmitterNVC0::emitSUSTGx(const TexInstruction *i) setSUPred(i, 2); } +void +CodeEmitterNVC0::emitSUAddr(const TexInstruction *i) +{ + assert(targ->getChipset() < NVISA_GK104_CHIPSET); + + if (i->tex.rIndirectSrc < 0) { + code[1] |= 0x00004000; + code[0] |= i->tex.r << 26; + } else { + srcId(i, i->tex.rIndirectSrc, 26); + } +} + +void +CodeEmitterNVC0::emitSUDim(const TexInstruction *i) +{ + assert(targ->getChipset() < NVISA_GK104_CHIPSET); + + code[1] |= (i->tex.target.getDim() - 1) << 12; + if (i->tex.target.isArray() || i->tex.target.isCube() || + i->tex.target.getDim() == 3) { + // use e2d mode for 3-dim images, arrays and cubes. + code[1] |= 3 << 12; + } + + srcId(i->src(0), 20); +} + +void +CodeEmitterNVC0::emitSULEA(const TexInstruction *i) +{ + assert(targ->getChipset() < NVISA_GK104_CHIPSET); + + code[0] = 0x5; + code[1] = 0xf0000000; + + emitPredicate(i); + emitLoadStoreType(i->sType); + + defId(i->def(0), 14); + + if (i->defExists(1)) { + defId(i->def(1), 32 + 22); + } else { + code[1] |= 7 << 22; + } + + emitSUAddr(i); + emitSUDim(i); +} + void CodeEmitterNVC0::emitVectorSubOp(const Instruction *i) { @@ -2579,6 +2634,9 @@ CodeEmitterNVC0::emitInstruction(Instruction *insn) else ERROR("SUSTx not yet supported on < nve4\n"); break; + case OP_SULEA: + emitSULEA(insn->asTex()); + break; case OP_ATOM: emitATOM(insn); break; -- 2.30.2