From cdbb77e4dc117af4545d3d83f2faa771295a05d5 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Mon, 26 Dec 2022 19:45:47 -0500 Subject: [PATCH] sim: bpf: move libsim.a creation to top-level The objects are still compiled in the subdir, but the creation of the archive itself is in the top-level. This is a required step before we can move compilation itself up, and makes it easier to review. The downside is that each object compile is a recursive make instead of a single one. On my 4 core system, it adds ~100msec to the build per port, so it's not great, but it shouldn't be a big deal. This will go away of course once the top-level compiles objects. --- sim/Makefile.in | 285 ++++++++++++++++++++++++++------------------ sim/bpf/Makefile.in | 13 +- sim/bpf/local.mk | 35 ++++++ 3 files changed, 207 insertions(+), 126 deletions(-) diff --git a/sim/Makefile.in b/sim/Makefile.in index b83b03ae057..2ea0a46afab 100644 --- a/sim/Makefile.in +++ b/sim/Makefile.in @@ -150,100 +150,101 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_bfin_TRUE@am__append_14 = bfin/libsim.a @SIM_ENABLE_ARCH_bfin_TRUE@am__append_15 = bfin/run @SIM_ENABLE_ARCH_bfin_TRUE@am__append_16 = bfin_SIM_EXTRA_HW_DEVICES="$(bfin_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = bpf/run -@SIM_ENABLE_ARCH_bpf_TRUE@am__append_18 = \ +@SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = bpf/libsim.a +@SIM_ENABLE_ARCH_bpf_TRUE@am__append_18 = bpf/run +@SIM_ENABLE_ARCH_bpf_TRUE@am__append_19 = \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-le.h \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-be.h -@SIM_ENABLE_ARCH_bpf_TRUE@am__append_19 = $(bpf_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_bpf_TRUE@am__append_20 = $(bpf_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_cr16_TRUE@am__append_21 = cr16/run -@SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = cr16/simops.h -@SIM_ENABLE_ARCH_cr16_TRUE@am__append_23 = $(cr16_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_cr16_TRUE@am__append_24 = cr16/gencode -@SIM_ENABLE_ARCH_cr16_TRUE@am__append_25 = $(cr16_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_cris_TRUE@am__append_26 = cris/run -@SIM_ENABLE_ARCH_cris_TRUE@am__append_27 = cris_SIM_EXTRA_HW_DEVICES="$(cris_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_cris_TRUE@am__append_28 = cris/rvdummy -@SIM_ENABLE_ARCH_cris_TRUE@am__append_29 = \ +@SIM_ENABLE_ARCH_bpf_TRUE@am__append_21 = $(bpf_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = cr16/run +@SIM_ENABLE_ARCH_cr16_TRUE@am__append_23 = cr16/simops.h +@SIM_ENABLE_ARCH_cr16_TRUE@am__append_24 = $(cr16_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_cr16_TRUE@am__append_25 = cr16/gencode +@SIM_ENABLE_ARCH_cr16_TRUE@am__append_26 = $(cr16_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_cris_TRUE@am__append_27 = cris/run +@SIM_ENABLE_ARCH_cris_TRUE@am__append_28 = cris_SIM_EXTRA_HW_DEVICES="$(cris_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_cris_TRUE@am__append_29 = cris/rvdummy +@SIM_ENABLE_ARCH_cris_TRUE@am__append_30 = \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv10.h \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv32.h -@SIM_ENABLE_ARCH_cris_TRUE@am__append_30 = $(cris_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_cris_TRUE@am__append_31 = $(cris_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_32 = d10v/run -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_33 = d10v/simops.h -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_34 = $(d10v_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_35 = d10v/gencode -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_36 = $(d10v_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_erc32_TRUE@am__append_37 = erc32/run erc32/sis -@SIM_ENABLE_ARCH_erc32_TRUE@am__append_38 = sim-%D-install-exec-local -@SIM_ENABLE_ARCH_erc32_TRUE@am__append_39 = sim-erc32-uninstall-local -@SIM_ENABLE_ARCH_examples_TRUE@am__append_40 = example-synacor/run -@SIM_ENABLE_ARCH_frv_TRUE@am__append_41 = frv/run -@SIM_ENABLE_ARCH_frv_TRUE@am__append_42 = frv/eng.h -@SIM_ENABLE_ARCH_frv_TRUE@am__append_43 = $(frv_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_cris_TRUE@am__append_32 = $(cris_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_33 = d10v/run +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_34 = d10v/simops.h +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_35 = $(d10v_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_36 = d10v/gencode +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_37 = $(d10v_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_erc32_TRUE@am__append_38 = erc32/run erc32/sis +@SIM_ENABLE_ARCH_erc32_TRUE@am__append_39 = sim-%D-install-exec-local +@SIM_ENABLE_ARCH_erc32_TRUE@am__append_40 = sim-erc32-uninstall-local +@SIM_ENABLE_ARCH_examples_TRUE@am__append_41 = example-synacor/run +@SIM_ENABLE_ARCH_frv_TRUE@am__append_42 = frv/run +@SIM_ENABLE_ARCH_frv_TRUE@am__append_43 = frv/eng.h @SIM_ENABLE_ARCH_frv_TRUE@am__append_44 = $(frv_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_ft32_TRUE@am__append_45 = ft32/run -@SIM_ENABLE_ARCH_h8300_TRUE@am__append_46 = h8300/run -@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_47 = iq2000/run -@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_48 = iq2000/eng.h -@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_49 = $(iq2000_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_frv_TRUE@am__append_45 = $(frv_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_ft32_TRUE@am__append_46 = ft32/run +@SIM_ENABLE_ARCH_h8300_TRUE@am__append_47 = h8300/run +@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_48 = iq2000/run +@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_49 = iq2000/eng.h @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_50 = $(iq2000_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_51 = lm32/run -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_52 = lm32_SIM_EXTRA_HW_DEVICES="$(lm32_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_53 = lm32/eng.h -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_54 = $(lm32_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_51 = $(iq2000_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_52 = lm32/run +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_53 = lm32_SIM_EXTRA_HW_DEVICES="$(lm32_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_54 = lm32/eng.h @SIM_ENABLE_ARCH_lm32_TRUE@am__append_55 = $(lm32_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_56 = m32c/run -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_57 = $(m32c_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_58 = m32c/opc2c -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_59 = \ +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_56 = $(lm32_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_57 = m32c/run +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_58 = $(m32c_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_59 = m32c/opc2c +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_60 = \ @SIM_ENABLE_ARCH_m32c_TRUE@ $(m32c_BUILD_OUTPUTS) \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c.log \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c.log -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_60 = m32r/run -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_61 = m32r_SIM_EXTRA_HW_DEVICES="$(m32r_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_62 = \ +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_61 = m32r/run +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_62 = m32r_SIM_EXTRA_HW_DEVICES="$(m32r_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_63 = \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng.h \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/engx.h \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng2.h -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_63 = $(m32r_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_m32r_TRUE@am__append_64 = $(m32r_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_65 = m68hc11/run -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_66 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_67 = $(m68hc11_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_68 = m68hc11/gencode -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_69 = $(m68hc11_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_mcore_TRUE@am__append_70 = mcore/run -@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_71 = microblaze/run -@SIM_ENABLE_ARCH_mips_TRUE@am__append_72 = mips/run -@SIM_ENABLE_ARCH_mips_TRUE@am__append_73 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_mips_TRUE@am__append_74 = mips/itable.h \ +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_65 = $(m32r_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_66 = m68hc11/run +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_67 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_68 = $(m68hc11_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_69 = m68hc11/gencode +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_70 = $(m68hc11_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_mcore_TRUE@am__append_71 = mcore/run +@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_72 = microblaze/run +@SIM_ENABLE_ARCH_mips_TRUE@am__append_73 = mips/run +@SIM_ENABLE_ARCH_mips_TRUE@am__append_74 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_mips_TRUE@am__append_75 = mips/itable.h \ @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_MULTI_SRC) -@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_75 = \ +@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_76 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/stamp-gen-mode-single -@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_76 = \ +@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_77 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32 -@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_77 = \ +@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_78 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_SRC) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-igen \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-run -@SIM_ENABLE_ARCH_mips_TRUE@am__append_78 = $(mips_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_mips_TRUE@am__append_79 = $(mips_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_mips_TRUE@am__append_80 = mips/multi-include.h mips/multi-run.c -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_81 = mn10300/run -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_82 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_83 = \ +@SIM_ENABLE_ARCH_mips_TRUE@am__append_80 = $(mips_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_mips_TRUE@am__append_81 = mips/multi-include.h mips/multi-run.c +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_82 = mn10300/run +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_83 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_84 = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \ @@ -252,29 +253,29 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_84 = $(mn10300_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_85 = $(mn10300_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_moxie_TRUE@am__append_86 = moxie/run -@SIM_ENABLE_ARCH_msp430_TRUE@am__append_87 = msp430/run -@SIM_ENABLE_ARCH_or1k_TRUE@am__append_88 = or1k/run -@SIM_ENABLE_ARCH_or1k_TRUE@am__append_89 = or1k/eng.h -@SIM_ENABLE_ARCH_or1k_TRUE@am__append_90 = $(or1k_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_86 = $(mn10300_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_moxie_TRUE@am__append_87 = moxie/run +@SIM_ENABLE_ARCH_msp430_TRUE@am__append_88 = msp430/run +@SIM_ENABLE_ARCH_or1k_TRUE@am__append_89 = or1k/run +@SIM_ENABLE_ARCH_or1k_TRUE@am__append_90 = or1k/eng.h @SIM_ENABLE_ARCH_or1k_TRUE@am__append_91 = $(or1k_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_ppc_TRUE@am__append_92 = ppc/run ppc/psim -@SIM_ENABLE_ARCH_pru_TRUE@am__append_93 = pru/run -@SIM_ENABLE_ARCH_riscv_TRUE@am__append_94 = riscv/run -@SIM_ENABLE_ARCH_rl78_TRUE@am__append_95 = rl78/run -@SIM_ENABLE_ARCH_rx_TRUE@am__append_96 = rx/run -@SIM_ENABLE_ARCH_sh_TRUE@am__append_97 = sh/run -@SIM_ENABLE_ARCH_sh_TRUE@am__append_98 = \ +@SIM_ENABLE_ARCH_or1k_TRUE@am__append_92 = $(or1k_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_ppc_TRUE@am__append_93 = ppc/run ppc/psim +@SIM_ENABLE_ARCH_pru_TRUE@am__append_94 = pru/run +@SIM_ENABLE_ARCH_riscv_TRUE@am__append_95 = riscv/run +@SIM_ENABLE_ARCH_rl78_TRUE@am__append_96 = rl78/run +@SIM_ENABLE_ARCH_rx_TRUE@am__append_97 = rx/run +@SIM_ENABLE_ARCH_sh_TRUE@am__append_98 = sh/run +@SIM_ENABLE_ARCH_sh_TRUE@am__append_99 = \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c -@SIM_ENABLE_ARCH_sh_TRUE@am__append_99 = $(sh_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_sh_TRUE@am__append_100 = sh/gencode -@SIM_ENABLE_ARCH_sh_TRUE@am__append_101 = $(sh_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_v850_TRUE@am__append_102 = v850/run -@SIM_ENABLE_ARCH_v850_TRUE@am__append_103 = \ +@SIM_ENABLE_ARCH_sh_TRUE@am__append_100 = $(sh_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_sh_TRUE@am__append_101 = sh/gencode +@SIM_ENABLE_ARCH_sh_TRUE@am__append_102 = $(sh_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_v850_TRUE@am__append_103 = v850/run +@SIM_ENABLE_ARCH_v850_TRUE@am__append_104 = \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \ @@ -283,8 +284,8 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h -@SIM_ENABLE_ARCH_v850_TRUE@am__append_104 = $(v850_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_v850_TRUE@am__append_105 = $(v850_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_v850_TRUE@am__append_106 = $(v850_BUILD_OUTPUTS) subdir = . ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \ @@ -401,6 +402,22 @@ bfin_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/sim-resume.o am_bfin_libsim_a_OBJECTS = bfin_libsim_a_OBJECTS = $(am_bfin_libsim_a_OBJECTS) +bpf_libsim_a_AR = $(AR) $(ARFLAGS) +@SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_DEPENDENCIES = $(patsubst \ +@SIM_ENABLE_ARCH_bpf_TRUE@ %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \ +@SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_bpf_TRUE@ %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/modules.o bpf/cgen-run.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-scache.o bpf/cgen-trace.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-utils.o bpf/arch.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cpu.o bpf/decode-le.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-be.o bpf/sem-le.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-be.o bpf/mloop-le.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.o bpf/bpf.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf-helpers.o bpf/sim-if.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/traps.o +am_bpf_libsim_a_OBJECTS = +bpf_libsim_a_OBJECTS = $(am_bpf_libsim_a_OBJECTS) common_libcommon_a_AR = $(AR) $(ARFLAGS) common_libcommon_a_LIBADD = am_common_libcommon_a_OBJECTS = common/callback.$(OBJEXT) \ @@ -755,12 +772,13 @@ am__v_CCLD_0 = @echo " CCLD " $@; am__v_CCLD_1 = SOURCES = $(aarch64_libsim_a_SOURCES) $(arm_libsim_a_SOURCES) \ $(avr_libsim_a_SOURCES) $(bfin_libsim_a_SOURCES) \ - $(common_libcommon_a_SOURCES) $(igen_libigen_a_SOURCES) \ - $(aarch64_run_SOURCES) $(arm_run_SOURCES) $(avr_run_SOURCES) \ - $(bfin_run_SOURCES) $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) \ - $(cr16_run_SOURCES) $(cris_run_SOURCES) \ - $(cris_rvdummy_SOURCES) $(d10v_gencode_SOURCES) \ - $(d10v_run_SOURCES) $(erc32_run_SOURCES) erc32/sis.c \ + $(bpf_libsim_a_SOURCES) $(common_libcommon_a_SOURCES) \ + $(igen_libigen_a_SOURCES) $(aarch64_run_SOURCES) \ + $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \ + $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \ + $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \ + $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \ + $(erc32_run_SOURCES) erc32/sis.c \ $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \ $(ft32_run_SOURCES) $(h8300_run_SOURCES) \ $(igen_filter_SOURCES) $(igen_gen_SOURCES) \ @@ -1311,32 +1329,33 @@ srccom = $(srcdir)/common srcroot = $(srcdir)/.. SUBDIRS = @subdirs@ $(SIM_SUBDIRS) AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \ - $(am__append_3) $(am__append_16) $(am__append_27) \ - $(am__append_52) $(am__append_61) $(am__append_66) \ - $(am__append_73) $(am__append_82) + $(am__append_3) $(am__append_16) $(am__append_28) \ + $(am__append_53) $(am__append_62) $(am__append_67) \ + $(am__append_74) $(am__append_83) pkginclude_HEADERS = $(am__append_1) noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \ - $(am__append_10) $(am__append_12) $(am__append_14) -BUILT_SOURCES = $(am__append_18) $(am__append_22) $(am__append_29) \ - $(am__append_33) $(am__append_42) $(am__append_48) \ - $(am__append_53) $(am__append_62) $(am__append_74) \ - $(am__append_83) $(am__append_89) $(am__append_98) \ - $(am__append_103) + $(am__append_10) $(am__append_12) $(am__append_14) \ + $(am__append_17) +BUILT_SOURCES = $(am__append_19) $(am__append_23) $(am__append_30) \ + $(am__append_34) $(am__append_43) $(am__append_49) \ + $(am__append_54) $(am__append_63) $(am__append_75) \ + $(am__append_84) $(am__append_90) $(am__append_99) \ + $(am__append_104) CLEANFILES = common/version.c common/version.c-stamp \ testsuite/common/bits-gen testsuite/common/bits32m0.c \ testsuite/common/bits32m31.c testsuite/common/bits64m0.c \ testsuite/common/bits64m63.c -DISTCLEANFILES = $(am__append_80) +DISTCLEANFILES = $(am__append_81) MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \ %,%/stamp-hw,$(SIM_ENABLED_ARCHES)) \ $(common_GEN_MODULES_C_TARGETS) $(patsubst \ %,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_7) \ - site-sim-config.exp testrun.log testrun.sum $(am__append_20) \ - $(am__append_25) $(am__append_31) $(am__append_36) \ - $(am__append_44) $(am__append_50) $(am__append_55) \ - $(am__append_59) $(am__append_64) $(am__append_69) \ - $(am__append_79) $(am__append_85) $(am__append_91) \ - $(am__append_101) $(am__append_105) + site-sim-config.exp testrun.log testrun.sum $(am__append_21) \ + $(am__append_26) $(am__append_32) $(am__append_37) \ + $(am__append_45) $(am__append_51) $(am__append_56) \ + $(am__append_60) $(am__append_65) $(am__append_70) \ + $(am__append_80) $(am__append_86) $(am__append_92) \ + $(am__append_102) $(am__append_106) AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS) AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \ $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \ @@ -1347,15 +1366,15 @@ COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUIL LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@ SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \ $(common_HW_CONFIG_H_TARGETS) $(common_GEN_MODULES_C_TARGETS) \ - $(am__append_4) $(am__append_19) $(am__append_23) \ - $(am__append_30) $(am__append_34) $(am__append_43) \ - $(am__append_49) $(am__append_54) $(am__append_57) \ - $(am__append_63) $(am__append_67) $(am__append_78) \ - $(am__append_84) $(am__append_90) $(am__append_99) \ - $(am__append_104) + $(am__append_4) $(am__append_20) $(am__append_24) \ + $(am__append_31) $(am__append_35) $(am__append_44) \ + $(am__append_50) $(am__append_55) $(am__append_58) \ + $(am__append_64) $(am__append_68) $(am__append_79) \ + $(am__append_85) $(am__append_91) $(am__append_100) \ + $(am__append_105) SIM_INSTALL_DATA_LOCAL_DEPS = -SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_38) -SIM_UNINSTALL_LOCAL_DEPS = $(am__append_39) +SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_39) +SIM_UNINSTALL_LOCAL_DEPS = $(am__append_40) common_libcommon_a_SOURCES = \ common/callback.c \ common/portability.c \ @@ -1628,6 +1647,32 @@ testsuite_common_CPPFLAGS = \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \ @SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy +@SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES = +@SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \ +@SIM_ENABLE_ARCH_bpf_TRUE@ $(common_libcommon_a_OBJECTS) \ +@SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \ +@SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/modules.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-run.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-scache.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-trace.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-utils.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/arch.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cpu.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-le.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-be.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-le.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-be.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-le.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf-helpers.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sim-if.o \ +@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/traps.o + @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES = @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/nrun.o \ @@ -1846,8 +1891,8 @@ testsuite_common_CPPFLAGS = \ @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/stamp-igen-itable \ -@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_75) $(am__append_76) \ -@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_77) +@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_76) $(am__append_77) \ +@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_78) @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \ @@ -2223,6 +2268,14 @@ bfin/libsim.a: $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_DEPENDENCIES) $(EXTRA_bf $(AM_V_at)-rm -f bfin/libsim.a $(AM_V_AR)$(bfin_libsim_a_AR) bfin/libsim.a $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) bfin/libsim.a +bpf/$(am__dirstamp): + @$(MKDIR_P) bpf + @: > bpf/$(am__dirstamp) + +bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_DEPENDENCIES) $(EXTRA_bpf_libsim_a_DEPENDENCIES) bpf/$(am__dirstamp) + $(AM_V_at)-rm -f bpf/libsim.a + $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD) + $(AM_V_at)$(RANLIB) bpf/libsim.a common/$(am__dirstamp): @$(MKDIR_P) common @: > common/$(am__dirstamp) @@ -2328,9 +2381,6 @@ avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEP bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp) @rm -f bfin/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS) -bpf/$(am__dirstamp): - @$(MKDIR_P) bpf - @: > bpf/$(am__dirstamp) bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp) @rm -f bpf/run$(EXEEXT) @@ -3666,6 +3716,13 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo @SIM_ENABLE_ARCH_bfin_TRUE@ ) > $@.tmp @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h +@SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h + +@SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: bpf/%.c +@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + +@SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c +@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true diff --git a/sim/bpf/Makefile.in b/sim/bpf/Makefile.in index 2732a0e6071..1fc98a68cbe 100644 --- a/sim/bpf/Makefile.in +++ b/sim/bpf/Makefile.in @@ -18,18 +18,7 @@ ## COMMON_PRE_CONFIG_FRAG -CGEN_STD_OBJS = cgen-run.o cgen-scache.o cgen-trace.o cgen-utils.o -BPF_GEN_OBJS = arch.o cpu.o \ - decode-le.o decode-be.o \ - sem-le.o sem-be.o \ - mloop-le.o mloop-be.o -BPF_HAND_OBJS = bpf.o sim-if.o traps.o bpf-helpers.o - -SIM_OBJS = \ - $(SIM_NEW_COMMON_OBJS) \ - $(CGEN_STD_OBJS) \ - $(BPF_GEN_OBJS) \ - $(BPF_HAND_OBJS) +SIM_LIBSIM = SIM_EXTRA_CFLAGS = -DWITH_TARGET_WORD_BITSIZE=64 diff --git a/sim/bpf/local.mk b/sim/bpf/local.mk index f86f3306a8a..19dcc25736c 100644 --- a/sim/bpf/local.mk +++ b/sim/bpf/local.mk @@ -15,6 +15,41 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . +%C%_libsim_a_SOURCES = +%C%_libsim_a_LIBADD = \ + $(common_libcommon_a_OBJECTS) \ + $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ + $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ + %D%/modules.o \ + \ + %D%/cgen-run.o \ + %D%/cgen-scache.o \ + %D%/cgen-trace.o \ + %D%/cgen-utils.o \ + \ + %D%/arch.o \ + %D%/cpu.o \ + %D%/decode-le.o \ + %D%/decode-be.o \ + %D%/sem-le.o \ + %D%/sem-be.o \ + %D%/mloop-le.o \ + %D%/mloop-be.o \ + \ + %D%/bpf.o \ + %D%/bpf-helpers.o \ + %D%/sim-if.o \ + %D%/traps.o +$(%C%_libsim_a_OBJECTS) $(%C%_libsim_a_LIBADD): %D%/hw-config.h + +noinst_LIBRARIES += %D%/libsim.a + +%D%/%.o: %D%/%.c + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + +%D%/%.o: common/%.c + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + %C%_run_SOURCES = %C%_run_LDADD = \ %D%/nrun.o \ -- 2.30.2