From cdc7ac23b9ada9133fbacb28cf3b52dcadc51fac Mon Sep 17 00:00:00 2001 From: Jordan Justen Date: Fri, 3 Nov 2017 16:40:17 -0700 Subject: [PATCH] i965: Add brw_program_deserialize_nir Signed-off-by: Jordan Justen Reviewed-by: Timothy Arceri --- src/mesa/drivers/dri/i965/brw_disk_cache.c | 31 ++++++---------------- src/mesa/drivers/dri/i965/brw_program.c | 16 +++++++++++ src/mesa/drivers/dri/i965/brw_program.h | 4 +++ 3 files changed, 28 insertions(+), 23 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_disk_cache.c b/src/mesa/drivers/dri/i965/brw_disk_cache.c index 853ea98af03..65bb52726eb 100644 --- a/src/mesa/drivers/dri/i965/brw_disk_cache.c +++ b/src/mesa/drivers/dri/i965/brw_disk_cache.c @@ -24,7 +24,6 @@ #include "compiler/blob.h" #include "compiler/glsl/ir_uniform.h" #include "compiler/glsl/shader_cache.h" -#include "compiler/nir/nir_serialize.h" #include "main/mtypes.h" #include "util/build_id.h" #include "util/debug.h" @@ -61,27 +60,6 @@ gen_shader_sha1(struct brw_context *brw, struct gl_program *prog, _mesa_sha1_compute(manifest, strlen(manifest), out_sha1); } -static void -restore_serialized_nir_shader(struct brw_context *brw, struct gl_program *prog, - gl_shader_stage stage) -{ - prog->program_written_to_cache = false; - if (brw->ctx._Shader->Flags & GLSL_CACHE_INFO) { - fprintf(stderr, "falling back to nir %s.\n", - _mesa_shader_stage_to_abbrev(prog->info.stage)); - } - - if (!prog->nir) { - assert(prog->driver_cache_blob && prog->driver_cache_blob_size > 0); - const struct nir_shader_compiler_options *options = - brw->ctx.Const.ShaderCompilerOptions[stage].NirOptions; - struct blob_reader reader; - blob_reader_init(&reader, prog->driver_cache_blob, - prog->driver_cache_blob_size); - prog->nir = nir_deserialize(NULL, options, &reader); - } -} - static void write_blob_program_data(struct blob *binary, gl_shader_stage stage, const void *program, @@ -298,7 +276,14 @@ brw_disk_cache_upload_program(struct brw_context *brw, gl_shader_stage stage) return true; fail: - restore_serialized_nir_shader(brw, prog, stage); + prog->program_written_to_cache = false; + if (brw->ctx._Shader->Flags & GLSL_CACHE_INFO) { + fprintf(stderr, "falling back to nir %s.\n", + _mesa_shader_stage_to_abbrev(prog->info.stage)); + } + + brw_program_deserialize_nir(&brw->ctx, prog, stage); + return false; } diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index 755d4973cc0..2a647cdd734 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -40,6 +40,7 @@ #include "util/ralloc.h" #include "compiler/glsl/ir.h" #include "compiler/glsl/glsl_to_nir.h" +#include "compiler/nir/nir_serialize.h" #include "brw_program.h" #include "brw_context.h" @@ -785,3 +786,18 @@ brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo, assert(next_binding_table_offset <= BRW_MAX_SURFACES); return next_binding_table_offset; } + +void +brw_program_deserialize_nir(struct gl_context *ctx, struct gl_program *prog, + gl_shader_stage stage) +{ + if (!prog->nir) { + assert(prog->driver_cache_blob && prog->driver_cache_blob_size > 0); + const struct nir_shader_compiler_options *options = + ctx->Const.ShaderCompilerOptions[stage].NirOptions; + struct blob_reader reader; + blob_reader_init(&reader, prog->driver_cache_blob, + prog->driver_cache_blob_size); + prog->nir = nir_deserialize(NULL, options, &reader); + } +} diff --git a/src/mesa/drivers/dri/i965/brw_program.h b/src/mesa/drivers/dri/i965/brw_program.h index 701b8da482e..bd9b4ad168a 100644 --- a/src/mesa/drivers/dri/i965/brw_program.h +++ b/src/mesa/drivers/dri/i965/brw_program.h @@ -81,6 +81,10 @@ brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo, struct brw_stage_prog_data *stage_prog_data, uint32_t next_binding_table_offset); +void +brw_program_deserialize_nir(struct gl_context *ctx, struct gl_program *prog, + gl_shader_stage stage); + void brw_stage_prog_data_free(const void *prog_data); -- 2.30.2