From ce440d638d271d76cc491bd22dc34f6a5760140e Mon Sep 17 00:00:00 2001 From: Graham Markall Date: Tue, 21 Jun 2016 20:25:29 +0100 Subject: [PATCH] [ARC] Misc minor edits/fixes The code supporting -mspfp, -mdpfp, and -mfpuda options are in sections of code that are commented as being for backward compatibility only, and having no effect. However, they do have an effect, enabling the SPX, DPX, and DPA instruction subclasses respectively. This commit moves the code supporting these options away from the comments indicating that they are dummy options, and also fixes a small issue where -mnps400 had the additional effect of enabling SPX instructions. A couple of other minor edits (that make no functional change) are also included. gas/ChangeLog: * config/tc-arc.c (options, md_longopts, md_parse_option): Move -mspfp, -mdpfp and -mfpuda out of the sections for dummy options. Correct erroneous enabling of SPFP instructions when using -mnps400. include/ChangeLog: * opcode/arc.h: Make insn_class_t alphabetical again. opcodes/ChangeLog: * arc-opc.c: Correct description of availability of NPS400 features. --- gas/ChangeLog | 7 +++++ gas/config/tc-arc.c | 73 ++++++++++++++++++++++---------------------- include/ChangeLog | 4 +++ include/opcode/arc.h | 6 ++-- opcodes/ChangeLog | 5 +++ opcodes/arc-opc.c | 4 +-- 6 files changed, 57 insertions(+), 42 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index ec4ad6869b7..66c36073410 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2016-06-23 Graham Markall + + * config/tc-arc.c (options, md_longopts, md_parse_option): Move + -mspfp, -mdpfp and -mfpuda out of the sections for dummy + options. Correct erroneous enabling of SPFP instructions when + using -mnps400. + 2016-06-22 Peter Bergner * testsuite/gas/ppc/power9.d + + * opcode/arc.h: Make insn_class_t alphabetical again. + 2016-06-22 Trevor Saunders * elf/dlx.h: Wrap in extern C. diff --git a/include/opcode/arc.h b/include/opcode/arc.h index df89e3cef2b..f0fefbbc933 100644 --- a/include/opcode/arc.h +++ b/include/opcode/arc.h @@ -39,10 +39,13 @@ extern "C" { /* Instruction Class. */ typedef enum { + ACL, ARITH, AUXREG, + BITOP, BRANCH, CONTROL, + DPI, DSP, FLOAT, INVALID, @@ -50,10 +53,7 @@ typedef enum KERNEL, LOGICAL, MEMORY, - BITOP, NET, - ACL, - DPI, } insn_class_t; /* Instruction Subclass. */ diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index b510736cf12..c9cf9ed1b78 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2016-06-23 Graham Markall + + * arc-opc.c: Correct description of availability of NPS400 + features. + 2016-06-22 Peter Bergner * ppc-opc.c (RM, DRM, VXASH, VXASH_MASK, XMMF, XMMF_MASK): New defines. diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c index df18167e1a6..ad50ebca420 100644 --- a/opcodes/arc-opc.c +++ b/opcodes/arc-opc.c @@ -27,9 +27,7 @@ #include "libiberty.h" /* ARC NPS400 Support: The ARC NPS400 core is an ARC700 with some custom - instructions. Support for this target is available when binutils is - configured and built for the 'arc*-mellanox-*-*' target. As far as - possible all ARC NPS400 features are built into all ARC target builds as + instructions. All NPS400 features are built into all ARC target builds as this reduces the chances that regressions might creep in. */ /* Insert RB register into a 32-bit opcode. */ -- 2.30.2