From ce90fd9676c3dfce6d692671909ee28d86a534ae Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Sun, 10 Aug 2014 07:10:55 -0700 Subject: [PATCH] i965/eu: Set src0 file to IMM on Gen8+ flow control instructions. According to the documentation, we need to set the source 0 register type to IMM for flow control instructinos that have both JIP and UIP. Out of paranoia, just make all flow control instructions use IMM; there's no benefit to using ARF anyway, and it could trouble that's difficult to diagnose. See commit 9584959123b0453cf5313722357e3abb9f736aa7, which did the analogous change in the gen8_generator code. Signed-off-by: Kenneth Graunke Reviewed-by: Chris Forbes Reviewed-by: Matt Turner --- src/mesa/drivers/dri/i965/brw_eu_emit.c | 45 ++++++++++++++++++++----- 1 file changed, 36 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index 11ae25a1d27..1a28a352933 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -1265,12 +1265,17 @@ brw_IF(struct brw_compile *p, unsigned execute_size) brw_inst_set_gen6_jump_count(brw, insn, 0); brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); brw_set_src1(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); - } else { + } else if (brw->gen == 7) { brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); brw_set_src1(p, insn, brw_imm_ud(0)); brw_inst_set_jip(brw, insn, 0); brw_inst_set_uip(brw, insn, 0); + } else { + brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); + brw_set_src0(p, insn, brw_imm_d(0)); + brw_inst_set_jip(brw, insn, 0); + brw_inst_set_uip(brw, insn, 0); } brw_inst_set_exec_size(brw, insn, execute_size); @@ -1461,12 +1466,17 @@ brw_ELSE(struct brw_compile *p) brw_inst_set_gen6_jump_count(brw, insn, 0); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - } else { + } else if (brw->gen == 7) { brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, brw_imm_ud(0)); brw_inst_set_jip(brw, insn, 0); brw_inst_set_uip(brw, insn, 0); + } else { + brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); + brw_set_src0(p, insn, brw_imm_d(0)); + brw_inst_set_jip(brw, insn, 0); + brw_inst_set_uip(brw, insn, 0); } brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE); @@ -1533,10 +1543,12 @@ brw_ENDIF(struct brw_compile *p) brw_set_dest(p, insn, brw_imm_w(0)); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - } else { + } else if (brw->gen == 7) { brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, brw_imm_ud(0)); + } else { + brw_set_src0(p, insn, brw_imm_d(0)); } brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE); @@ -1563,7 +1575,10 @@ brw_BREAK(struct brw_compile *p) brw_inst *insn; insn = next_insn(p, BRW_OPCODE_BREAK); - if (brw->gen >= 6) { + if (brw->gen >= 8) { + brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); + brw_set_src0(p, insn, brw_imm_d(0x0)); + } else if (brw->gen >= 6) { brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, brw_imm_d(0x0)); @@ -1589,8 +1604,12 @@ brw_CONT(struct brw_compile *p) insn = next_insn(p, BRW_OPCODE_CONTINUE); brw_set_dest(p, insn, brw_ip_reg()); - brw_set_src0(p, insn, brw_ip_reg()); - brw_set_src1(p, insn, brw_imm_d(0x0)); + if (brw->gen >= 8) { + brw_set_src0(p, insn, brw_imm_d(0x0)); + } else { + brw_set_src0(p, insn, brw_ip_reg()); + brw_set_src1(p, insn, brw_imm_d(0x0)); + } if (brw->gen < 6) { brw_inst_set_gen4_pop_count(brw, insn, @@ -1610,8 +1629,12 @@ gen6_HALT(struct brw_compile *p) insn = next_insn(p, BRW_OPCODE_HALT); brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src1(p, insn, brw_imm_d(0x0)); /* UIP and JIP, updated later. */ + if (brw->gen >= 8) { + brw_set_src0(p, insn, brw_imm_d(0x0)); + } else { + brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); + brw_set_src1(p, insn, brw_imm_d(0x0)); /* UIP and JIP, updated later. */ + } if (p->compressed) { brw_inst_set_exec_size(brw, insn, BRW_EXECUTE_16); @@ -1708,7 +1731,11 @@ brw_WHILE(struct brw_compile *p) insn = next_insn(p, BRW_OPCODE_WHILE); do_insn = get_inner_do_insn(p); - if (brw->gen == 7) { + if (brw->gen >= 8) { + brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); + brw_set_src0(p, insn, brw_imm_d(0)); + brw_inst_set_jip(brw, insn, br * (do_insn - insn)); + } else if (brw->gen == 7) { brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, brw_imm_ud(0)); -- 2.30.2