From cef4b65070a67ba1afa3359f21c48e4529ac154b Mon Sep 17 00:00:00 2001 From: Michael Meissner Date: Fri, 8 Jul 2016 14:49:37 +0000 Subject: [PATCH] re PR target/71806 (PowerPC -mcpu=power9 enables __float128 without an explicit -mfloat128) [gcc] 2016-07-08 Michael Meissner PR target/71806 * config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Do not enable -mfloat128-hardware by default. (ISA_3_0_MASKS_IEEE): New macro to give all of the VSX options that IEEE 128-bit hardware support needs. * config/rs6000/rs6000.c (rs6000_option_override_internal): If -mcpu=power9 -mfloat128, enable -mfloat128-hardware by default. Use ISA_3_0_MASKS_IEEE as the set of options that IEEE 128-bit floating point requires. * doc/invoke.texi (RS/6000 and PowerPC Options): Document -mfloat128 and -mfloat128-hardware changes. [gcc/testsuite] 2016-07-08 Michael Meissner PR target/71806 * gcc.target/powerpc/p9-lxvx-stxvx-3.c: Add -mfloat128 option. From-SVN: r238164 --- gcc/ChangeLog | 14 +++++++++++++ gcc/config/rs6000/rs6000-cpus.def | 14 +++++++++++-- gcc/config/rs6000/rs6000.c | 21 +++++++++++-------- gcc/doc/invoke.texi | 14 ++++++++++++- gcc/testsuite/ChangeLog | 5 +++++ .../gcc.target/powerpc/p9-lxvx-stxvx-3.c | 2 +- 6 files changed, 57 insertions(+), 13 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index dc648ca3253..e2711cc5029 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,17 @@ +2016-07-08 Michael Meissner + + PR target/71806 + * config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Do not + enable -mfloat128-hardware by default. + (ISA_3_0_MASKS_IEEE): New macro to give all of the VSX options + that IEEE 128-bit hardware support needs. + * config/rs6000/rs6000.c (rs6000_option_override_internal): If + -mcpu=power9 -mfloat128, enable -mfloat128-hardware by default. + Use ISA_3_0_MASKS_IEEE as the set of options that IEEE 128-bit + floating point requires. + * doc/invoke.texi (RS/6000 and PowerPC Options): Document + -mfloat128 and -mfloat128-hardware changes. + 2016-07-08 Alan Hayward PR tree-optimization/71667 diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index 7c67b6f2c8e..401088f5304 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -61,9 +61,9 @@ | OPTION_MASK_UPPER_REGS_SF) /* Add ISEL back into ISA 3.0, since it is supposed to be a win. Do not add - P9_MINMAX until the hardware that supports it is available. */ + P9_MINMAX until the hardware that supports it is available. Do not add + FLOAT128_HW here until we are ready to make -mfloat128 on by default. */ #define ISA_3_0_MASKS_SERVER (ISA_2_7_MASKS_SERVER \ - | OPTION_MASK_FLOAT128_HW \ | OPTION_MASK_ISEL \ | OPTION_MASK_MODULO \ | OPTION_MASK_P9_FUSION \ @@ -72,6 +72,16 @@ | OPTION_MASK_P9_MISC \ | OPTION_MASK_P9_VECTOR) +/* Support for the IEEE 128-bit floating point hardware requires a lot of the + VSX instructions that are part of ISA 3.0. */ +#define ISA_3_0_MASKS_IEEE (OPTION_MASK_VSX \ + | OPTION_MASK_P8_VECTOR \ + | OPTION_MASK_P9_VECTOR \ + | OPTION_MASK_DIRECT_MOVE \ + | OPTION_MASK_UPPER_REGS_DI \ + | OPTION_MASK_UPPER_REGS_DF \ + | OPTION_MASK_UPPER_REGS_SF) + #define POWERPC_7400_MASK (OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC) /* Deal with ports that do not have -mstrict-align. */ diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index d2a62bdd72b..99a2e36911b 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -4381,14 +4381,21 @@ rs6000_option_override_internal (bool global_init_p) rs6000_isa_flags &= ~(OPTION_MASK_FLOAT128 | OPTION_MASK_FLOAT128_HW); } + /* If we have -mfloat128 and full ISA 3.0 support, enable -mfloat128-hardware + by default. */ + if (TARGET_FLOAT128 && !TARGET_FLOAT128_HW + && (rs6000_isa_flags & ISA_3_0_MASKS_IEEE) == ISA_3_0_MASKS_IEEE + && !(rs6000_isa_flags_explicit & OPTION_MASK_FLOAT128_HW)) + { + rs6000_isa_flags |= OPTION_MASK_FLOAT128_HW; + if ((rs6000_isa_flags & OPTION_MASK_FLOAT128) != 0) + rs6000_isa_flags_explicit |= OPTION_MASK_FLOAT128_HW; + } + /* IEEE 128-bit floating point hardware instructions imply enabling __float128. */ if (TARGET_FLOAT128_HW - && (rs6000_isa_flags & (OPTION_MASK_P9_VECTOR - | OPTION_MASK_DIRECT_MOVE - | OPTION_MASK_UPPER_REGS_DI - | OPTION_MASK_UPPER_REGS_DF - | OPTION_MASK_UPPER_REGS_SF)) == 0) + && (rs6000_isa_flags & ISA_3_0_MASKS_IEEE) != ISA_3_0_MASKS_IEEE) { if ((rs6000_isa_flags_explicit & OPTION_MASK_FLOAT128_HW) != 0) error ("-mfloat128-hardware requires full ISA 3.0 support"); @@ -4396,10 +4403,6 @@ rs6000_option_override_internal (bool global_init_p) rs6000_isa_flags &= ~OPTION_MASK_FLOAT128_HW; } - else if (TARGET_P9_VECTOR && !TARGET_FLOAT128_HW - && (rs6000_isa_flags_explicit & OPTION_MASK_FLOAT128_HW) == 0) - rs6000_isa_flags |= OPTION_MASK_FLOAT128_HW; - if (TARGET_FLOAT128_HW && (rs6000_isa_flags_explicit & OPTION_MASK_FLOAT128) == 0) rs6000_isa_flags |= OPTION_MASK_FLOAT128; diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index b6398ff3512..e185178bf55 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -20355,9 +20355,14 @@ hardware instructions. The VSX instruction set (@option{-mvsx}, @option{-mcpu=power7}, or @option{-mcpu=power8}) must be enabled to use the @option{-mfloat128} -option. The @code{-mfloat128} option only works on PowerPC 64-bit +option. The @option{-mfloat128} option only works on PowerPC 64-bit Linux systems. +If you use the ISA 3.0 instruction set (@option{-mcpu=power9}), the +@option{-mfloat128} option will also enable the generation of ISA 3.0 +IEEE 128-bit floating point instructions. Otherwise, IEEE 128-bit +floating point will be done with software emulation. + @item -mfloat128-hardware @itemx -mno-float128-hardware @opindex mfloat128-hardware @@ -20365,6 +20370,13 @@ Linux systems. Enable/disable using ISA 3.0 hardware instructions to support the @var{__float128} data type. +If you use @option{-mfloat128-hardware}, it will enable the option +@option{-mfloat128} as well. + +If you select ISA 3.0 instructions with @option{-mcpu=power9}, but do +not use either @option{-mfloat128} or @option{-mfloat128-hardware}, +the IEEE 128-bit floating point support will not be enabled. + @item -mmodulo @itemx -mno-modulo @opindex mmodulo diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3af679a511f..ab2537f22fc 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-07-08 Michael Meissner + + PR target/71806 + * gcc.target/powerpc/p9-lxvx-stxvx-3.c: Add -mfloat128 option. + 2016-07-08 Alan Hayward PR tree-optimization/71667 diff --git a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c index 4947386721a..b8a03d30f9a 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc64le-*-* } } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ -/* { dg-options "-mcpu=power9 -O3" } */ +/* { dg-options "-mcpu=power9 -O3 -mfloat128" } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-final { scan-assembler "lxvx" } } */ /* { dg-final { scan-assembler "stxvx" } } */ -- 2.30.2