From cf3721fc77b9f28469b73d800a7ea92cdaadd796 Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 5 May 2022 15:59:37 +0100 Subject: [PATCH] --- openpower/sv/SimpleV_rationale.mdwn | 31 +++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn index 6e1859324..a1d0701d3 100644 --- a/openpower/sv/SimpleV_rationale.mdwn +++ b/openpower/sv/SimpleV_rationale.mdwn @@ -67,3 +67,34 @@ there aren't as many really truly viable Vector ISAs out there, as the ones that are evolving in the general direction of Vectorisation are, in various completely different ways, flawed. +**Successfully identifying a limitation marks the beginning of an opportunity** + +We are nowhere near done, however, because a Vector ISA is a superset of +a Scalar ISA, and even a Scalar ISA takes over a decade to develop +compiler support, and even longer to get the software ecosystem up and +running. + +Which ISAs, therefore, have or have had, at one point in time, a decent Software +Ecosystem? + +* SPARC, created by Sun Microsystems and all but abandoned by Oracle. +* MIPS, created by SGI and only really commonly used in Network switches. + Exceptions: Ingenic with embedded CPUs, + and China ICT with the Loongson supercomputers. +* x86, the most well-known ISA and also one of the most heavily + litigously-protected. +* ARM, well known in embedded and smartphone scenarios, very slowly + making its way into data centres. +* OpenRISC, an entirely Open ISA suitable for embedded systems. +* s390, a Mainframe ISA very similar to Power. +* Power ISA, a Supercomputing-class ISA. +* ARC, a competitor at the time to ARM, best known for use in + Broadcom VideoCore IV. +* Tensilica, Andes STAR and Western Digital for successful + commercial proprietary ISAs: Tensilica in Baseband Modems, + Andes in Audio DSPs, WD in HDDs and SSDs. These are all + multi-billion-unit mass volume markets that almost nobody + knows anything about. Included for completeness. + + + -- 2.30.2