From cfabbbcfd778cc404813c9f05a9ef79efe531980 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Nicolai=20H=C3=A4hnle?= Date: Mon, 16 Jan 2017 16:43:54 +0100 Subject: [PATCH] st/glsl_to_tgsi: use DDIV instead of DRCP + DMUL MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Fixes GL45-CTS.gpu_shader_fp64.built_in_functions. v2: use DDIV unconditionally (Roland) Reviewed-by: Roland Scheidegger (v1) Reviewed-by: Marek Olšák (v1) Tested-by: Glenn Kennard Tested-by: James Harvey Cc: 17.0 --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index 46952dcd3a2..37bd09fbc31 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp @@ -955,7 +955,7 @@ glsl_to_tgsi_visitor::get_opcode(unsigned op, case3fid(MUL, UMUL, DMUL); case3fid(MAD, UMAD, DMAD); case3fid(FMA, UMAD, DFMA); - case3(DIV, IDIV, UDIV); + case4d(DIV, IDIV, UDIV, DDIV); case4d(MAX, IMAX, UMAX, DMAX); case4d(MIN, IMIN, UMIN, DMIN); case2iu(MOD, UMOD); @@ -1710,10 +1710,7 @@ glsl_to_tgsi_visitor::visit_expression(ir_expression* ir, st_src_reg *op) emit_asm(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]); break; case ir_binop_div: - if (result_dst.type == GLSL_TYPE_FLOAT || result_dst.type == GLSL_TYPE_DOUBLE) - assert(!"not reached: should be handled by ir_div_to_mul_rcp"); - else - emit_asm(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]); break; case ir_binop_mod: if (result_dst.type == GLSL_TYPE_FLOAT) @@ -6918,7 +6915,7 @@ st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog) lower_instructions(ir, MOD_TO_FLOOR | - DIV_TO_MUL_RCP | + FDIV_TO_MUL_RCP | EXP_TO_EXP2 | LOG_TO_LOG2 | LDEXP_TO_ARITH | -- 2.30.2