From cfbf3ee885e20ad736d606a658d53e34fc05db60 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Mon, 19 Aug 2013 17:29:59 +0000 Subject: [PATCH] mips.c (mips_adjust_insn_length): Add checks for JUMP_P and INSN_P. gcc/ * config/mips/mips.c (mips_adjust_insn_length): Add checks for JUMP_P and INSN_P. From-SVN: r201847 --- gcc/ChangeLog | 5 +++++ gcc/config/mips/mips.c | 5 ++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index dd6559d2017..8c96b96a911 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2013-08-19 Richard Sandiford + + * config/mips/mips.c (mips_adjust_insn_length): Add checks for + JUMP_P and INSN_P. + 2013-08-19 Aldy Hernandez * doc/invoke.texi (-fcilkplus): Clarify that implementation is diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 4da80f42e7b..5993aabe578 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -12297,6 +12297,7 @@ mips_adjust_insn_length (rtx insn, int length) /* mips.md uses MAX_PIC_BRANCH_LENGTH as a placeholder for the length of a PIC long-branch sequence. Substitute the correct value. */ if (length == MAX_PIC_BRANCH_LENGTH + && JUMP_P (insn) && INSN_CODE (insn) >= 0 && get_attr_type (insn) == TYPE_BRANCH) { @@ -12318,7 +12319,9 @@ mips_adjust_insn_length (rtx insn, int length) length += TARGET_MIPS16 ? 2 : 4; /* See how many nops might be needed to avoid hardware hazards. */ - if (!cfun->machine->ignore_hazard_length_p && INSN_CODE (insn) >= 0) + if (!cfun->machine->ignore_hazard_length_p + && INSN_P (insn) + && INSN_CODE (insn) >= 0) switch (get_attr_hazard (insn)) { case HAZARD_NONE: -- 2.30.2