From cfc31088b514868bcfaba035428092f46fe74abd Mon Sep 17 00:00:00 2001
From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Thu, 19 Oct 2023 11:21:03 +0100
Subject: [PATCH] added lhasx instruction

---
 openpower/isa/fixedloadshift.mdwn | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn
index b401e12c..d55a814d 100644
--- a/openpower/isa/fixedloadshift.mdwn
+++ b/openpower/isa/fixedloadshift.mdwn
@@ -26,7 +26,7 @@
 <!-- halfword, word, or doubleword) addressed by EA is loaded into RT. -->
 
 
-# Load Byte and Zero Shifted Indexed 
+# Load Byte and Zero Shifted Indexed
 
 X-Form
 
@@ -90,16 +90,16 @@ Special Registers Altered:
 
     None
 
-# Load Halfword Algebraic Indexed
+# Load Halfword Algebraic Shifted Indexed
 
 X-Form
 
-* lhax RT,RA,RB
+* lhasx RT,RA,RB,sm
 
 Pseudo-code:
 
     b <- (RA|0)
-    EA <- b + (RB)
+    EA <- b + (RB) << (sm+1)
     RT <- EXTS(MEM(EA, 2))
 
 Special Registers Altered:
-- 
2.30.2