From cfdf185a15de5d0b7013c9b5826c6044e8230b53 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 16 Jun 2020 17:47:23 -0700 Subject: [PATCH] cpu: Remove default argument values for the update() method in bpreds. These defaults are never used. There was an assert in the predictors until recently which was asserting that one of the arguments didn't have the default value, I think to verify that the default wasn't used by accident(?), but it could be used purposefully. That would cause gem5 to crash and has been removed. Beyond that, there's no reason to have default values for those arguments in the first place, so this change removes them. That makes the code slightly simpler, and avoids them being used by accident. Additionally, the defalt values of the arguments made the function signatures inconsistent, even though they were supposed to override each other. JIRA: https://gem5.atlassian.net/browse/GEM5-483 Change-Id: I28f8d2048985c12ec9cac018a868a32bfa20dc6c Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30375 Reviewed-by: Hsuan Hsu Reviewed-by: Andreas Sandberg Maintainer: Gabe Black Maintainer: Andreas Sandberg Tested-by: kokoro --- src/cpu/pred/bpred_unit.hh | 3 +-- src/cpu/pred/ltage.hh | 2 +- src/cpu/pred/multiperspective_perceptron.hh | 2 +- src/cpu/pred/multiperspective_perceptron_tage.hh | 2 +- src/cpu/pred/tage.hh | 2 +- src/cpu/pred/tage_sc_l.hh | 2 +- 6 files changed, 6 insertions(+), 7 deletions(-) diff --git a/src/cpu/pred/bpred_unit.hh b/src/cpu/pred/bpred_unit.hh index c4dbad2b0..3ca6fa86a 100644 --- a/src/cpu/pred/bpred_unit.hh +++ b/src/cpu/pred/bpred_unit.hh @@ -177,8 +177,7 @@ class BPredUnit : public SimObject */ virtual void update(ThreadID tid, Addr instPC, bool taken, void *bp_history, bool squashed, - const StaticInstPtr & inst = StaticInst::nullStaticInstPtr, - Addr corrTarget = MaxAddr) = 0; + const StaticInstPtr &inst, Addr corrTarget) = 0; /** * Updates the BTB with the target of a branch. * @param inst_PC The branch's PC that will be updated. diff --git a/src/cpu/pred/ltage.hh b/src/cpu/pred/ltage.hh index 53081dae4..0bbac81d1 100644 --- a/src/cpu/pred/ltage.hh +++ b/src/cpu/pred/ltage.hh @@ -66,7 +66,7 @@ class LTAGE : public TAGE void squash(ThreadID tid, void *bp_history) override; void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history, bool squashed, const StaticInstPtr & inst, - Addr corrTarget = MaxAddr) override; + Addr corrTarget) override; void init() override; virtual void regStats() override; diff --git a/src/cpu/pred/multiperspective_perceptron.hh b/src/cpu/pred/multiperspective_perceptron.hh index 9d4503244..c225aa4c3 100644 --- a/src/cpu/pred/multiperspective_perceptron.hh +++ b/src/cpu/pred/multiperspective_perceptron.hh @@ -1029,7 +1029,7 @@ class MultiperspectivePerceptron : public BPredUnit void update(ThreadID tid, Addr instPC, bool taken, void *bp_history, bool squashed, const StaticInstPtr & inst, - Addr corrTarget = MaxAddr) override; + Addr corrTarget) override; void btbUpdate(ThreadID tid, Addr branch_addr, void* &bp_history) override; }; #endif//__CPU_PRED_MULTIPERSPECTIVE_PERCEPTRON_HH__ diff --git a/src/cpu/pred/multiperspective_perceptron_tage.hh b/src/cpu/pred/multiperspective_perceptron_tage.hh index b18774e54..366f7b8aa 100644 --- a/src/cpu/pred/multiperspective_perceptron_tage.hh +++ b/src/cpu/pred/multiperspective_perceptron_tage.hh @@ -228,7 +228,7 @@ class MultiperspectivePerceptronTAGE : public MultiperspectivePerceptron void update(ThreadID tid, Addr instPC, bool taken, void *bp_history, bool squashed, const StaticInstPtr & inst, - Addr corrTarget = MaxAddr) override; + Addr corrTarget) override; void uncondBranch(ThreadID tid, Addr pc, void * &bp_history) override; void squash(ThreadID tid, void *bp_history) override; diff --git a/src/cpu/pred/tage.hh b/src/cpu/pred/tage.hh index a58571773..b32ce6746 100644 --- a/src/cpu/pred/tage.hh +++ b/src/cpu/pred/tage.hh @@ -85,7 +85,7 @@ class TAGE: public BPredUnit void btbUpdate(ThreadID tid, Addr branch_addr, void* &bp_history) override; void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history, bool squashed, const StaticInstPtr & inst, - Addr corrTarget = MaxAddr) override; + Addr corrTarget) override; virtual void squash(ThreadID tid, void *bp_history) override; }; diff --git a/src/cpu/pred/tage_sc_l.hh b/src/cpu/pred/tage_sc_l.hh index b3629ab7e..71f9c1766 100644 --- a/src/cpu/pred/tage_sc_l.hh +++ b/src/cpu/pred/tage_sc_l.hh @@ -158,7 +158,7 @@ class TAGE_SC_L: public LTAGE void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history, bool squashed, const StaticInstPtr & inst, - Addr corrTarget = MaxAddr) override; + Addr corrTarget) override; protected: -- 2.30.2