From d017d42bebbc562cca2766936fd258ecad2a80d3 Mon Sep 17 00:00:00 2001 From: lkcl Date: Fri, 9 Sep 2022 03:14:57 +0100 Subject: [PATCH] --- openpower/sv/rfc/ls001.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn index 9bccbea55..d110d9adb 100644 --- a/openpower/sv/rfc/ls001.mdwn +++ b/openpower/sv/rfc/ls001.mdwn @@ -136,7 +136,7 @@ at least the next decade (including if added on VSX) **SPRs** * **SVSTATE** - Vectorisation State sufficient for Precise-Interrupt - Context-switchung and no adverse latency impact. + Context-switching and no adverse latency. * **SVSRR0** - identical in purpose to SRR0/1: storing SVSTATE on context-switch along-side MSR and PC. * **SVSHAPE0-3** - these are 32-bit and may be grouped in pairs, they REMAP -- 2.30.2