From d0403cafd479964a80d95299d079845593e9891f Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Wed, 9 May 2012 11:43:17 -0400 Subject: [PATCH] radeon/llvm: Make sure the LOAD_CONST def uses the isSI predicate --- src/gallium/drivers/radeon/SIInstrInfo.td | 7 ------- src/gallium/drivers/radeon/SIInstructions.td | 7 +++++++ 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/radeon/SIInstrInfo.td b/src/gallium/drivers/radeon/SIInstrInfo.td index 65b28ec84ad..4b6b99ffc30 100644 --- a/src/gallium/drivers/radeon/SIInstrInfo.td +++ b/src/gallium/drivers/radeon/SIInstrInfo.td @@ -464,11 +464,4 @@ def IMM12bit : ImmLeaf < include "SIInstrFormats.td" -def LOAD_CONST : AMDGPUShaderInst < - (outs GPRF32:$dst), - (ins i32imm:$src), - "LOAD_CONST $dst, $src", - [(set GPRF32:$dst, (int_AMDGPU_load_const imm:$src))] ->; - include "SIInstructions.td" diff --git a/src/gallium/drivers/radeon/SIInstructions.td b/src/gallium/drivers/radeon/SIInstructions.td index 7fa397a31a3..a145b9a44c5 100644 --- a/src/gallium/drivers/radeon/SIInstructions.td +++ b/src/gallium/drivers/radeon/SIInstructions.td @@ -800,6 +800,13 @@ def CONFIG_WRITE : InstSI < field bits<32> Inst = 0; } +def LOAD_CONST : AMDGPUShaderInst < + (outs GPRF32:$dst), + (ins i32imm:$src), + "LOAD_CONST $dst, $src", + [(set GPRF32:$dst, (int_AMDGPU_load_const imm:$src))] +>; + let usesCustomInserter = 1 in { def SI_V_CNDLT : InstSI < -- 2.30.2