From d07473fcf4126c740802e6458452e82cc5c799ba Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Thu, 17 May 2012 13:41:21 -0400 Subject: [PATCH] radeon/llvm: Remove AMDIL MUL_IEEE* instructions --- src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl | 2 +- src/gallium/drivers/radeon/AMDILInstructions.td | 3 --- src/gallium/drivers/radeon/R600Instructions.td | 5 ++--- 3 files changed, 3 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl b/src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl index 498ef13baee..df532eb94b0 100644 --- a/src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl +++ b/src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl @@ -56,7 +56,7 @@ my $FILE_TYPE = $ARGV[0]; open AMDIL, '<', 'AMDILInstructions.td'; -my @INST_ENUMS = ('NONE', 'FEQ', 'FGE', 'FLT', 'FNE', 'MOVE_f32', 'MOVE_i32', 'FTOI', 'ITOF', 'UGT', 'IGE', 'INE', 'UGE', 'IEQ', 'BINARY_OR_i32', 'BINARY_NOT_i32', 'MIN_f32', 'MUL_IEEE_f32'); +my @INST_ENUMS = ('NONE', 'FEQ', 'FGE', 'FLT', 'FNE', 'MOVE_f32', 'MOVE_i32', 'FTOI', 'ITOF', 'UGT', 'IGE', 'INE', 'UGE', 'IEQ', 'BINARY_OR_i32', 'BINARY_NOT_i32', 'MIN_f32'); while () { if ($_ =~ /defm\s+([A-Z_]+)\s+:\s+([A-Za-z0-9]+); -} //===---------------------------------------------------------------------===// // float math instructions start here //===---------------------------------------------------------------------===// diff --git a/src/gallium/drivers/radeon/R600Instructions.td b/src/gallium/drivers/radeon/R600Instructions.td index c66d62d2be3..75ccca235de 100644 --- a/src/gallium/drivers/radeon/R600Instructions.td +++ b/src/gallium/drivers/radeon/R600Instructions.td @@ -255,9 +255,8 @@ def MUL : R600_2OP < def MUL_IEEE : R600_2OP < 0x2, "MUL_IEEE", - [(set R600_Reg32:$dst, (fmul R600_Reg32:$src0, R600_Reg32:$src1))]> { - let AMDILOp = AMDILInst.MUL_IEEE_f32; -} + [(set R600_Reg32:$dst, (fmul R600_Reg32:$src0, R600_Reg32:$src1))] +>; def MAX : R600_2OP < 0x3, "MAX", -- 2.30.2