From d0baaae35172c6cfb7a0c314842bf2cfc62a40f2 Mon Sep 17 00:00:00 2001 From: Jiong Wang Date: Wed, 1 Jul 2015 09:01:47 +0000 Subject: [PATCH] [AArch64] Document several AArch64-specific test directives 2015-07-01 Jiong Wang * doc/sourcebuild.texi (AArch64-specific attributes): Document "aarch64_tiny", "aarch64_small", "aarch64_large", "aarch64_little_endian", "aarch64_big_endian". From-SVN: r225233 --- gcc/ChangeLog | 6 ++++++ gcc/doc/sourcebuild.texi | 10 ++++++++++ 2 files changed, 16 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6df579b0f96..eab90cff91f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-07-01 Jiong Wang + + * doc/sourcebuild.texi (AArch64-specific attributes): Document + "aarch64_tiny", "aarch64_small", "aarch64_large", + "aarch64_little_endian", "aarch64_big_endian". + 2015-07-01 Jiong Wang * doc/sourcebuild.texi (AArch64-specific attributes): New subsection. diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index 52a4aa48be1..d339d1e5d8a 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -1583,6 +1583,16 @@ ARM target prefers @code{LDRD} and @code{STRD} instructions over @subsubsection AArch64-specific attributes @table @code +@item aarch64_tiny +AArch64 target which generates instruction sequences for tiny memory model. +@item aarch64_small +AArch64 target which generates instruction sequences for small memory model. +@item aarch64_large +AArch64 target which generates instruction sequences for large memory model. +@item aarch64_little_endian +AArch64 target which generates instruction sequences for little endian. +@item aarch64_big_endian +AArch64 target which generates instruction sequences for big endian. @item aarch64_small_fpic Binutils installed on test system supports relocation types required by -fpic for AArch64 small memory model. -- 2.30.2