From d0e0f445599ab58e72e2163b2d014110401b7c0f Mon Sep 17 00:00:00 2001 From: lkcl Date: Wed, 7 Jul 2021 12:22:41 +0100 Subject: [PATCH] --- conferences/iit_roorkee_2021.mdwn | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 conferences/iit_roorkee_2021.mdwn diff --git a/conferences/iit_roorkee_2021.mdwn b/conferences/iit_roorkee_2021.mdwn new file mode 100644 index 000000000..bee3b7137 --- /dev/null +++ b/conferences/iit_roorkee_2021.mdwn @@ -0,0 +1,27 @@ +# IIT Rourkee 2021 + +## Abstract + +The Libre-SOC Project aims to create an entirely Libre-Licensed, +transparently-developed fully auditable Hybrid 3D CPU-GPU-VPU, +using the Supercomputer-class OpenPOWER ISA as the foundation. + +Our first test ASIC is a 180nm "Fixed-Point" Power ISA v3.0B +processor, 5.1mm x 5.9mm, as a proof-of-concept for the team, +whose primary expertise is in Software Engineering. Software +Engineering training brings a radically different approach to +Hardware development: extensive unit tests, source code revision +control, automated development tools are normal. Libre Project +Management brings even more: bugtrackers, mailing lists, auditable +IRC logs and a wiki are standard fare for Libre Projects that are +simply not normal Industry-Standard practice. + +This talk therefore goes through the workflow, from the original +HDL through to the GDS-II layout, showing how we were able to keep +track of the development that led to the IMEC 180nm tape-out in +July 2021. + +# Links + +* IIT Roorkee, 2021 July 16th. +* -- 2.30.2