From d1bcc29f799a1d2d04fae6adf3b732b51a9259a6 Mon Sep 17 00:00:00 2001 From: Andrew Pinski Date: Tue, 21 Oct 2014 18:30:35 +0000 Subject: [PATCH] invoke.texi (AARCH64/mtune): Document thunderx as an available option also. 2014-10-21 Andrew Pinski * doc/invoke.texi (AARCH64/mtune): Document thunderx as an available option also. * config/aarch64/aarch64-cost-tables.h: New file. * config/aarch64/aarch64-cores.def (thunderx): New core. * config/aarch64/aarch64-tune.md: Regenerate. * config/aarch64/aarch64.c: Include aarch64-cost-tables.h instead of config/arm/aarch-cost-tables.h. (thunderx_regmove_cost): New variable. (thunderx_tunings): New variable. From-SVN: r216524 --- gcc/ChangeLog | 12 +++ gcc/config/aarch64/aarch64-cores.def | 1 + gcc/config/aarch64/aarch64-cost-tables.h | 131 +++++++++++++++++++++++ gcc/config/aarch64/aarch64-tune.md | 2 +- gcc/config/aarch64/aarch64.c | 20 +++- gcc/doc/invoke.texi | 2 +- 6 files changed, 165 insertions(+), 3 deletions(-) create mode 100644 gcc/config/aarch64/aarch64-cost-tables.h diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 931ec2e5253..4e9f64d694a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2014-10-21 Andrew Pinski + + * doc/invoke.texi (AARCH64/mtune): Document thunderx as an + available option also. + * config/aarch64/aarch64-cost-tables.h: New file. + * config/aarch64/aarch64-cores.def (thunderx): New core. + * config/aarch64/aarch64-tune.md: Regenerate. + * config/aarch64/aarch64.c: Include aarch64-cost-tables.h instead + of config/arm/aarch-cost-tables.h. + (thunderx_regmove_cost): New variable. + (thunderx_tunings): New variable. + 2014-10-21 Dehao Chen * auto-profile.c: New file. diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index 9319249e62e..b3318c3532b 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -36,6 +36,7 @@ AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8, AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa53) AARCH64_CORE("cortex-a57", cortexa15, cortexa15, 8, AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57) +AARCH64_CORE("thunderx", thunderx, cortexa53, 8, AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx) /* V8 big.LITTLE implementations. */ diff --git a/gcc/config/aarch64/aarch64-cost-tables.h b/gcc/config/aarch64/aarch64-cost-tables.h new file mode 100644 index 00000000000..5764245b3cf --- /dev/null +++ b/gcc/config/aarch64/aarch64-cost-tables.h @@ -0,0 +1,131 @@ +/* RTX cost tables for AArch64. + + Copyright (C) 2014 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + . */ + +#ifndef GCC_AARCH64_COST_TABLES_H +#define GCC_AARCH64_COST_TABLES_H + +#include "config/arm/aarch-cost-tables.h" + +/* ThunderX does not have implement AArch32. */ +const struct cpu_cost_table thunderx_extra_costs = +{ + /* ALU */ + { + 0, /* Arith. */ + 0, /* Logical. */ + 0, /* Shift. */ + 0, /* Shift_reg. */ + COSTS_N_INSNS (1), /* Arith_shift. */ + COSTS_N_INSNS (1), /* Arith_shift_reg. */ + COSTS_N_INSNS (1), /* UNUSED: Log_shift. */ + COSTS_N_INSNS (1), /* UNUSED: Log_shift_reg. */ + 0, /* Extend. */ + COSTS_N_INSNS (1), /* Extend_arith. */ + 0, /* Bfi. */ + 0, /* Bfx. */ + COSTS_N_INSNS (5), /* Clz. */ + 0, /* rev. */ + 0, /* UNUSED: non_exec. */ + false /* UNUSED: non_exec_costs_exec. */ + }, + { + /* MULT SImode */ + { + COSTS_N_INSNS (3), /* Simple. */ + 0, /* Flag_setting. */ + 0, /* Extend. */ + 0, /* Add. */ + COSTS_N_INSNS (1), /* Extend_add. */ + COSTS_N_INSNS (21) /* Idiv. */ + }, + /* MULT DImode */ + { + COSTS_N_INSNS (3), /* Simple. */ + 0, /* Flag_setting. */ + 0, /* Extend. */ + 0, /* Add. */ + COSTS_N_INSNS (1), /* Extend_add. */ + COSTS_N_INSNS (37) /* Idiv. */ + }, + }, + /* LD/ST */ + { + COSTS_N_INSNS (2), /* Load. */ + COSTS_N_INSNS (2), /* Load_sign_extend. */ + COSTS_N_INSNS (2), /* Ldrd. */ + 0, /* N/A: Ldm_1st. */ + 0, /* N/A: Ldm_regs_per_insn_1st. */ + 0, /* N/A: Ldm_regs_per_insn_subsequent. */ + COSTS_N_INSNS (3), /* Loadf. */ + COSTS_N_INSNS (3), /* Loadd. */ + 0, /* N/A: Load_unaligned. */ + 0, /* Store. */ + 0, /* Strd. */ + 0, /* N/A: Stm_1st. */ + 0, /* N/A: Stm_regs_per_insn_1st. */ + 0, /* N/A: Stm_regs_per_insn_subsequent. */ + 0, /* Storef. */ + 0, /* Stored. */ + COSTS_N_INSNS (1) /* Store_unaligned. */ + }, + { + /* FP SFmode */ + { + COSTS_N_INSNS (11), /* Div. */ + COSTS_N_INSNS (5), /* Mult. */ + COSTS_N_INSNS (5), /* Mult_addsub. */ + COSTS_N_INSNS (5), /* Fma. */ + COSTS_N_INSNS (3), /* Addsub. */ + 0, /* Fpconst. */ + COSTS_N_INSNS (1), /* Neg. */ + 0, /* Compare. */ + COSTS_N_INSNS (5), /* Widen. */ + COSTS_N_INSNS (5), /* Narrow. */ + COSTS_N_INSNS (5), /* Toint. */ + COSTS_N_INSNS (5), /* Fromint. */ + COSTS_N_INSNS (1) /* Roundint. */ + }, + /* FP DFmode */ + { + COSTS_N_INSNS (21), /* Div. */ + COSTS_N_INSNS (5), /* Mult. */ + COSTS_N_INSNS (5), /* Mult_addsub. */ + COSTS_N_INSNS (5), /* Fma. */ + COSTS_N_INSNS (3), /* Addsub. */ + 0, /* Fpconst. */ + COSTS_N_INSNS (1), /* Neg. */ + 0, /* Compare. */ + COSTS_N_INSNS (5), /* Widen. */ + COSTS_N_INSNS (5), /* Narrow. */ + COSTS_N_INSNS (5), /* Toint. */ + COSTS_N_INSNS (5), /* Fromint. */ + COSTS_N_INSNS (1) /* Roundint. */ + } + }, + /* Vector */ + { + COSTS_N_INSNS (1) /* Alu. */ + } +}; + + + +#endif + diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md index b7e40e0b5d1..c717ea848bc 100644 --- a/gcc/config/aarch64/aarch64-tune.md +++ b/gcc/config/aarch64/aarch64-tune.md @@ -1,5 +1,5 @@ ;; -*- buffer-read-only: t -*- ;; Generated automatically by gentune.sh from aarch64-cores.def (define_attr "tune" - "cortexa53,cortexa15,cortexa57cortexa53" + "cortexa53,cortexa15,thunderx,cortexa57cortexa53" (const (symbol_ref "((enum attr_tune) aarch64_tune)"))) diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 2ad5c28282e..b94f4508601 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -65,7 +65,7 @@ #include "dwarf2.h" #include "cfgloop.h" #include "tree-vectorizer.h" -#include "config/arm/aarch-cost-tables.h" +#include "aarch64-cost-tables.h" #include "dumpfile.h" #include "builtins.h" @@ -242,6 +242,14 @@ static const struct cpu_regmove_cost cortexa53_regmove_cost = NAMED_PARAM (FP2FP, 2) }; +static const struct cpu_regmove_cost thunderx_regmove_cost = +{ + NAMED_PARAM (GP2GP, 2), + NAMED_PARAM (GP2FP, 2), + NAMED_PARAM (FP2GP, 6), + NAMED_PARAM (FP2FP, 4) +}; + /* Generic costs for vector insn classes. */ #if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 __extension__ @@ -315,6 +323,16 @@ static const struct tune_params cortexa57_tunings = NAMED_PARAM (issue_rate, 3) }; +static const struct tune_params thunderx_tunings = +{ + &thunderx_extra_costs, + &generic_addrcost_table, + &thunderx_regmove_cost, + &generic_vector_cost, + NAMED_PARAM (memmov_cost, 6), + NAMED_PARAM (issue_rate, 2) +}; + /* A processor implementing AArch64. */ struct processor { diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 0b26976c520..644169e7b9a 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -11852,7 +11852,7 @@ architecture. @opindex mtune Specify the name of the target processor for which GCC should tune the performance of the code. Permissible values for this option are: -@samp{generic}, @samp{cortex-a53}, @samp{cortex-a57}. +@samp{generic}, @samp{cortex-a53}, @samp{cortex-a57}, @samp{thunderx}. Additionally, this option can specify that GCC should tune the performance of the code for a big.LITTLE system. The only permissible value is -- 2.30.2