From d1c0190f897a3e1ee2f171f93ac2f34f69c1519b Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 25 Mar 2021 21:39:35 +0000 Subject: [PATCH] --- openpower/ISA_WG/Board_letter_26mar2021.mdwn | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/openpower/ISA_WG/Board_letter_26mar2021.mdwn b/openpower/ISA_WG/Board_letter_26mar2021.mdwn index df5e44c63..e03c93c32 100644 --- a/openpower/ISA_WG/Board_letter_26mar2021.mdwn +++ b/openpower/ISA_WG/Board_letter_26mar2021.mdwn @@ -25,7 +25,9 @@ to be sent to: Dear OPF Board, -As you know the LibreSOC team have been working for over 3 years on a massive conceptual upgrade to the OpenPOWER ISA, based on Cray-Style Vectors, which will modernise it for today's 3D and VPU workloads, with an incidental side-effect of upgrading it for future supercomputing needs over the next few decades in a clean and elegant fashion. RISC-V has RVV, ARM has SVE2, x86 has AVX512, whilst OpenPOWER has an out-of-date SIMD ISA. It goes without saying that over the past few decades, SIMD has been demonstrated to be harmful. +As you know the LibreSOC team have been working for over 3 years on a massive conceptual upgrade to the OpenPOWER ISA, based on Cray-Style Vectors, which will modernise it for today's 3D and VPU workloads, with an incidental side-effect of upgrading it for future supercomputing needs over the next few decades in a clean and elegant fashion. + +RISC-V has RVV, ARM has SVE2, x86 has AVX512, whilst OpenPOWER has an out-of-date SIMD ISA which is already so large that efforts to update it would so far more harm than good. It goes without saying that over the past few decades, SIMD has been demonstrated to be harmful. https://www.sigarch.org/simd-instructions-considered-harmful/ -- 2.30.2