From d1c1cbd5c11a8e6490584f4a86526503664640d1 Mon Sep 17 00:00:00 2001 From: Marat Zakirov Date: Fri, 11 Jul 2014 09:02:39 +0000 Subject: [PATCH] re PR target/61561 (arm gcc internal error) gcc/ 2014-07-11 Marat Zakirov PR target/61561 * config/arm/arm.md (*movhi_insn_arch4): Handle stack pointer. (*movhi_bytes): Likewise. (*arm_movqi_insn): Likewise. gcc/testsuite/ 2014-07-11 Marat Zakirov PR target/61561 * gcc.dg/pr61561.c: New test. From-SVN: r212450 --- gcc/ChangeLog | 7 +++++++ gcc/config/arm/arm.md | 6 +++--- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.dg/pr61561.c | 15 +++++++++++++++ 4 files changed, 30 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/pr61561.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f9d02b531f7..87c732ff7ab 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2014-07-11 Marat Zakirov + + PR target/61561 + * config/arm/arm.md (*movhi_insn_arch4): Handle stack pointer. + (*movhi_bytes): Likewise. + (*arm_movqi_insn): Likewise. + 2014-07-11 Uros Bizjak PR target/56858 diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index d6ca79a3c2e..dac7a0a6056 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -6286,7 +6286,7 @@ ;; Pattern to recognize insn generated default case above (define_insn "*movhi_insn_arch4" [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r") - (match_operand:HI 1 "general_operand" "rI,K,r,mi"))] + (match_operand:HI 1 "general_operand" "rIk,K,r,mi"))] "TARGET_ARM && arm_arch4 && (register_operand (operands[0], HImode) @@ -6310,7 +6310,7 @@ (define_insn "*movhi_bytes" [(set (match_operand:HI 0 "s_register_operand" "=r,r,r") - (match_operand:HI 1 "arm_rhs_operand" "I,r,K"))] + (match_operand:HI 1 "arm_rhs_operand" "I,rk,K"))] "TARGET_ARM" "@ mov%?\\t%0, %1\\t%@ movhi @@ -6425,7 +6425,7 @@ (define_insn "*arm_movqi_insn" [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,l,r,l,Uu,r,m") - (match_operand:QI 1 "general_operand" "r,r,I,Py,K,Uu,l,m,r"))] + (match_operand:QI 1 "general_operand" "rk,rk,I,Py,K,Uu,l,m,r"))] "TARGET_32BIT && ( register_operand (operands[0], QImode) || register_operand (operands[1], QImode))" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1fb313a4090..63b51c67589 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2014-07-11 Marat Zakirov + + PR target/61561 + * gcc.dg/pr61561.c: New test. + 2014-07-10 Tom de Vries * gcc.target/mips/fuse-caller-save.c: Add addressing=absolute to diff --git a/gcc/testsuite/gcc.dg/pr61561.c b/gcc/testsuite/gcc.dg/pr61561.c new file mode 100644 index 00000000000..1512f20e3d0 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr61561.c @@ -0,0 +1,15 @@ +/* PR c/61561. */ +/* { dg-do assemble } */ +/* { dg-options " -w -O2" } */ + +int dummy (int a); + +char a; +short b; + +void mmm (void) +{ + char dyn[dummy (3)]; + a = (char)&dyn[0]; + b = (short)&dyn[0]; +} -- 2.30.2