From d2491828a426f8167709e543969777549e1b72a8 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Fri, 1 Mar 2013 12:06:12 +0100 Subject: [PATCH] csr/SRAM: prefix page register with memory name --- migen/bus/csr.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/migen/bus/csr.py b/migen/bus/csr.py index 264c63c0..9deb334b 100644 --- a/migen/bus/csr.py +++ b/migen/bus/csr.py @@ -62,7 +62,7 @@ class SRAM: self.address = address page_bits = _compute_page_bits(self.mem.depth) if page_bits: - self._page = RegisterField("page", page_bits) + self._page = RegisterField(self.mem.name_override + "_page", page_bits) else: self._page = None if bus is None: -- 2.30.2