From d2cd411356b0e6de58e502bf65c1683811b69af6 Mon Sep 17 00:00:00 2001 From: Chungyi Chi Date: Thu, 17 Sep 2020 09:45:50 +0100 Subject: [PATCH] gdb/riscv: fix decode of c.sdsp instruction The decode of c.sdsp was incorrectly claiming to be a 4-byte store instead of an 8-byte store. gdb/ChangeLog: * riscv-tdep.c (riscv-insn::decode): Fix recorded insn type. --- gdb/ChangeLog | 4 ++++ gdb/riscv-tdep.c | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 84ee292750e..c6136f6b9f5 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,7 @@ +2020-09-17 Chungyi Chi + + * riscv-tdep.c (riscv-insn::decode): Fix recorded insn type. + 2020-09-16 Simon Marchi * breakpoint.h (init_catchpoint): Change int parameter to bool. diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c index a7c25642d03..ac4ac1b6fdf 100644 --- a/gdb/riscv-tdep.c +++ b/gdb/riscv-tdep.c @@ -1472,7 +1472,7 @@ riscv_insn::decode (struct gdbarch *gdbarch, CORE_ADDR pc) else if (is_c_swsp_insn (ival)) decode_css_type_insn (SW, ival, EXTRACT_RVC_SWSP_IMM (ival)); else if (xlen != 4 && is_c_sdsp_insn (ival)) - decode_css_type_insn (SW, ival, EXTRACT_RVC_SDSP_IMM (ival)); + decode_css_type_insn (SD, ival, EXTRACT_RVC_SDSP_IMM (ival)); /* C_JR and C_MV have the same opcode. If RS2 is 0, then this is a C_JR. So must try to match C_JR first as it ahs more bits in mask. */ else if (is_c_jr_insn (ival)) -- 2.30.2