From d2d280851cae5f72684ef2ba1d4ee99ce3753511 Mon Sep 17 00:00:00 2001
From: Jeffrey A Law <law@cygnus.com>
Date: Tue, 13 Apr 1999 01:13:07 +0000
Subject: [PATCH] pa.c: Remove space register specification in memory
 addresses...

        * pa.c: Remove space register specification in memory addresses,
        except where it is actually needed.
        * pa.md, pa.h, ee.asm, ee_fp.asm, lib2funcs.asm: Likewise.

From-SVN: r26398
---
 gcc/ChangeLog               |   6 ++
 gcc/config/pa/ee.asm        | 108 +++++++++++++++++-----------------
 gcc/config/pa/ee_fp.asm     | 112 +++++++++++++++++------------------
 gcc/config/pa/lib2funcs.asm |   4 +-
 gcc/config/pa/pa.c          | 108 +++++++++++++++++-----------------
 gcc/config/pa/pa.h          |  16 ++---
 gcc/config/pa/pa.md         | 114 ++++++++++++++++++------------------
 7 files changed, 237 insertions(+), 231 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index eb935a8abf4..449ed875216 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+Tue Apr 13 02:11:11 1999  Jeffrey A Law  (law@cygnus.com)
+
+	* pa.c: Remove space register specification in memory addresses,
+	except where it is actually needed.
+	* pa.md, pa.h, ee.asm, ee_fp.asm, lib2funcs.asm: Likewise.
+
 Mon Apr 12 23:34:35 PDT 1999 Jeff Law  (law@cygnus.com)
 
 	* version.c: Bump for snapshot.
diff --git a/gcc/config/pa/ee.asm b/gcc/config/pa/ee.asm
index 787bda75c0d..757632b066b 100644
--- a/gcc/config/pa/ee.asm
+++ b/gcc/config/pa/ee.asm
@@ -62,7 +62,7 @@ __outline_prologue
         ldo -4(%r31),%r31
 
 	; Save off %r2
-	stw %r2,-20(0,%r30)
+	stw %r2,-20(%r30)
 
 	; Make our new frame.
 	add %r21,%r30,%r30
@@ -86,37 +86,37 @@ __outline_prologue
 	subi 18,%r1,%r1
 	blr,n %r1,%r0
 	b,n L$0000
-	stws,ma %r18,4(0,%r20)
+	stws,ma %r18,4(%r20)
 	nop
-	stws,ma %r17,4(0,%r20)
+	stws,ma %r17,4(%r20)
 	nop
-	stws,ma %r16,4(0,%r20)
+	stws,ma %r16,4(%r20)
 	nop
-	stws,ma %r15,4(0,%r20)
+	stws,ma %r15,4(%r20)
 	nop
-	stws,ma %r14,4(0,%r20)
+	stws,ma %r14,4(%r20)
 	nop
-	stws,ma %r13,4(0,%r20)
+	stws,ma %r13,4(%r20)
 	nop
-	stws,ma %r12,4(0,%r20)
+	stws,ma %r12,4(%r20)
 	nop
-	stws,ma %r11,4(0,%r20)
+	stws,ma %r11,4(%r20)
 	nop
-	stws,ma %r10,4(0,%r20)
+	stws,ma %r10,4(%r20)
 	nop
-	stws,ma %r9,4(0,%r20)
+	stws,ma %r9,4(%r20)
 	nop
-	stws,ma %r8,4(0,%r20)
+	stws,ma %r8,4(%r20)
 	nop
-	stws,ma %r7,4(0,%r20)
+	stws,ma %r7,4(%r20)
 	nop
-	stws,ma %r6,4(0,%r20)
+	stws,ma %r6,4(%r20)
 	nop
-	stws,ma %r5,4(0,%r20)
+	stws,ma %r5,4(%r20)
 	nop
-	stws,ma %r4,4(0,%r20)
+	stws,ma %r4,4(%r20)
 	nop
-	stws,ma %r3,4(0,%r20)
+	stws,ma %r3,4(%r20)
 	nop
 L$0000
 	; All gr saves are done.  Align the temporary frame pointer and
@@ -128,25 +128,25 @@ L$0000
 	subi 21,%r22,%r22
 	blr,n %r22,%r0
 	b,n L$0001
-	fstws,ma %fr21,8(0,%r20)
+	fstws,ma %fr21,8(%r20)
 	nop
-	fstws,ma %fr20,8(0,%r20)
+	fstws,ma %fr20,8(%r20)
 	nop
-	fstws,ma %fr19,8(0,%r20)
+	fstws,ma %fr19,8(%r20)
 	nop
-	fstws,ma %fr18,8(0,%r20)
+	fstws,ma %fr18,8(%r20)
 	nop
-	fstws,ma %fr17,8(0,%r20)
+	fstws,ma %fr17,8(%r20)
 	nop
-	fstws,ma %fr16,8(0,%r20)
+	fstws,ma %fr16,8(%r20)
 	nop
-	fstws,ma %fr15,8(0,%r20)
+	fstws,ma %fr15,8(%r20)
 	nop
-	fstws,ma %fr14,8(0,%r20)
+	fstws,ma %fr14,8(%r20)
 	nop
-	fstws,ma %fr13,8(0,%r20)
+	fstws,ma %fr13,8(%r20)
 	nop
-	fstws,ma %fr12,8(0,%r20)
+	fstws,ma %fr12,8(%r20)
 	nop
 L$0001
 	; Return
@@ -170,7 +170,7 @@ __outline_epilogue
         ldo -4(%r31),%r31
 
 	; Reload %r2
-	ldw -20(0,%r20),%r2
+	ldw -20(%r20),%r2
 
 	; Add in local_fsize (%r19) to the frame pointer to find
 	; the saved registers.
@@ -191,37 +191,37 @@ __outline_epilogue
 	subi 18,%r1,%r1
 	blr,n %r1,%r0
 	b,n L$0004
-	ldws,ma 4(0,%r20),%r18
+	ldws,ma 4(%r20),%r18
 	nop
-	ldws,ma 4(0,%r20),%r17
+	ldws,ma 4(%r20),%r17
 	nop
-	ldws,ma 4(0,%r20),%r16
+	ldws,ma 4(%r20),%r16
 	nop
-	ldws,ma 4(0,%r20),%r15
+	ldws,ma 4(%r20),%r15
 	nop
-	ldws,ma 4(0,%r20),%r14
+	ldws,ma 4(%r20),%r14
 	nop
-	ldws,ma 4(0,%r20),%r13
+	ldws,ma 4(%r20),%r13
 	nop
-	ldws,ma 4(0,%r20),%r12
+	ldws,ma 4(%r20),%r12
 	nop
-	ldws,ma 4(0,%r20),%r11
+	ldws,ma 4(%r20),%r11
 	nop
-	ldws,ma 4(0,%r20),%r10
+	ldws,ma 4(%r20),%r10
 	nop
-	ldws,ma 4(0,%r20),%r9
+	ldws,ma 4(%r20),%r9
 	nop
-	ldws,ma 4(0,%r20),%r8
+	ldws,ma 4(%r20),%r8
 	nop
-	ldws,ma 4(0,%r20),%r7
+	ldws,ma 4(%r20),%r7
 	nop
-	ldws,ma 4(0,%r20),%r6
+	ldws,ma 4(%r20),%r6
 	nop
-	ldws,ma 4(0,%r20),%r5
+	ldws,ma 4(%r20),%r5
 	nop
-	ldws,ma 4(0,%r20),%r4
+	ldws,ma 4(%r20),%r4
 	nop
-	ldws,ma 4(0,%r20),%r3
+	ldws,ma 4(%r20),%r3
 	nop
 L$0004
 	; All gr restore are done.  Align the temporary frame pointer and
@@ -233,25 +233,25 @@ L$0004
 	subi 21,%r22,%r22
 	blr,n %r22,%r0
 	b,n L$0005
-	fldws,ma 8(0,%r20),%fr21
+	fldws,ma 8(%r20),%fr21
 	nop
-	fldws,ma 8(0,%r20),%fr20
+	fldws,ma 8(%r20),%fr20
 	nop
-	fldws,ma 8(0,%r20),%fr19
+	fldws,ma 8(%r20),%fr19
 	nop
-	fldws,ma 8(0,%r20),%fr18
+	fldws,ma 8(%r20),%fr18
 	nop
-	fldws,ma 8(0,%r20),%fr17
+	fldws,ma 8(%r20),%fr17
 	nop
-	fldws,ma 8(0,%r20),%fr16
+	fldws,ma 8(%r20),%fr16
 	nop
-	fldws,ma 8(0,%r20),%fr15
+	fldws,ma 8(%r20),%fr15
 	nop
-	fldws,ma 8(0,%r20),%fr14
+	fldws,ma 8(%r20),%fr14
 	nop
-	fldws,ma 8(0,%r20),%fr13
+	fldws,ma 8(%r20),%fr13
 	nop
-	fldws,ma 8(0,%r20),%fr12
+	fldws,ma 8(%r20),%fr12
 	nop
 L$0005
 	; Return and deallocate our frame.
diff --git a/gcc/config/pa/ee_fp.asm b/gcc/config/pa/ee_fp.asm
index ef040cf7dad..18a7fbbaad1 100644
--- a/gcc/config/pa/ee_fp.asm
+++ b/gcc/config/pa/ee_fp.asm
@@ -63,13 +63,13 @@ __outline_prologue_fp
         ldo -4(%r31),%r31
 
 	; Save off %r2
-	stw %r2,-20(0,%r30)
+	stw %r2,-20(%r30)
 
 	; Make our new frame.
 	add %r21,%r30,%r30
 
 	; Save our old stack pointer.
-	stw %r20,0(0,%r20)
+	stw %r20,0(%r20)
 
 	; Add in local_fsize to our frame pointer so we do register
 	; saves into the right place
@@ -90,37 +90,37 @@ __outline_prologue_fp
 	subi 18,%r1,%r1
 	blr,n %r1,%r0
 	b,n L$0002
-	stws,ma %r18,4(0,%r20)
+	stws,ma %r18,4(%r20)
 	nop
-	stws,ma %r17,4(0,%r20)
+	stws,ma %r17,4(%r20)
 	nop
-	stws,ma %r16,4(0,%r20)
+	stws,ma %r16,4(%r20)
 	nop
-	stws,ma %r15,4(0,%r20)
+	stws,ma %r15,4(%r20)
 	nop
-	stws,ma %r14,4(0,%r20)
+	stws,ma %r14,4(%r20)
 	nop
-	stws,ma %r13,4(0,%r20)
+	stws,ma %r13,4(%r20)
 	nop
-	stws,ma %r12,4(0,%r20)
+	stws,ma %r12,4(%r20)
 	nop
-	stws,ma %r11,4(0,%r20)
+	stws,ma %r11,4(%r20)
 	nop
-	stws,ma %r10,4(0,%r20)
+	stws,ma %r10,4(%r20)
 	nop
-	stws,ma %r9,4(0,%r20)
+	stws,ma %r9,4(%r20)
 	nop
-	stws,ma %r8,4(0,%r20)
+	stws,ma %r8,4(%r20)
 	nop
-	stws,ma %r7,4(0,%r20)
+	stws,ma %r7,4(%r20)
 	nop
-	stws,ma %r6,4(0,%r20)
+	stws,ma %r6,4(%r20)
 	nop
-	stws,ma %r5,4(0,%r20)
+	stws,ma %r5,4(%r20)
 	nop
-	stws,ma %r4,4(0,%r20)
+	stws,ma %r4,4(%r20)
 	nop
-	stws,ma %r3,4(0,%r20)
+	stws,ma %r3,4(%r20)
 	nop
 L$0002
 	; All gr saves are done.  Align the temporary frame pointer and
@@ -132,25 +132,25 @@ L$0002
 	subi 21,%r22,%r22
 	blr,n %r22,%r0
 	b,n L$0003
-	fstws,ma %fr21,8(0,%r20)
+	fstws,ma %fr21,8(%r20)
 	nop
-	fstws,ma %fr20,8(0,%r20)
+	fstws,ma %fr20,8(%r20)
 	nop
-	fstws,ma %fr19,8(0,%r20)
+	fstws,ma %fr19,8(%r20)
 	nop
-	fstws,ma %fr18,8(0,%r20)
+	fstws,ma %fr18,8(%r20)
 	nop
-	fstws,ma %fr17,8(0,%r20)
+	fstws,ma %fr17,8(%r20)
 	nop
-	fstws,ma %fr16,8(0,%r20)
+	fstws,ma %fr16,8(%r20)
 	nop
-	fstws,ma %fr15,8(0,%r20)
+	fstws,ma %fr15,8(%r20)
 	nop
-	fstws,ma %fr14,8(0,%r20)
+	fstws,ma %fr14,8(%r20)
 	nop
-	fstws,ma %fr13,8(0,%r20)
+	fstws,ma %fr13,8(%r20)
 	nop
-	fstws,ma %fr12,8(0,%r20)
+	fstws,ma %fr12,8(%r20)
 	nop
 L$0003
 	; Return, setting up a frame pointer in the delay slot
@@ -178,10 +178,10 @@ __outline_epilogue_fp
 
 	; Reload %r2
 	; First save off %r2
-	ldw -20(0,%r20),%r2
+	ldw -20(%r20),%r2
 
 	; Load our old stack pointer, save it in %r21.
-	ldw 0(0,%r20),%r21
+	ldw 0(%r20),%r21
 
 	; Add in local_fsize (%r19) to the frame pointer to find
 	; the saved registers.
@@ -202,37 +202,37 @@ __outline_epilogue_fp
 	subi 18,%r1,%r1
 	blr,n %r1,%r0
 	b,n L$0006
-	ldws,ma 4(0,%r20),%r18
+	ldws,ma 4(%r20),%r18
 	nop
-	ldws,ma 4(0,%r20),%r17
+	ldws,ma 4(%r20),%r17
 	nop
-	ldws,ma 4(0,%r20),%r16
+	ldws,ma 4(%r20),%r16
 	nop
-	ldws,ma 4(0,%r20),%r15
+	ldws,ma 4(%r20),%r15
 	nop
-	ldws,ma 4(0,%r20),%r14
+	ldws,ma 4(%r20),%r14
 	nop
-	ldws,ma 4(0,%r20),%r13
+	ldws,ma 4(%r20),%r13
 	nop
-	ldws,ma 4(0,%r20),%r12
+	ldws,ma 4(%r20),%r12
 	nop
-	ldws,ma 4(0,%r20),%r11
+	ldws,ma 4(%r20),%r11
 	nop
-	ldws,ma 4(0,%r20),%r10
+	ldws,ma 4(%r20),%r10
 	nop
-	ldws,ma 4(0,%r20),%r9
+	ldws,ma 4(%r20),%r9
 	nop
-	ldws,ma 4(0,%r20),%r8
+	ldws,ma 4(%r20),%r8
 	nop
-	ldws,ma 4(0,%r20),%r7
+	ldws,ma 4(%r20),%r7
 	nop
-	ldws,ma 4(0,%r20),%r6
+	ldws,ma 4(%r20),%r6
 	nop
-	ldws,ma 4(0,%r20),%r5
+	ldws,ma 4(%r20),%r5
 	nop
-	ldws,ma 4(0,%r20),%r4
+	ldws,ma 4(%r20),%r4
 	nop
-	ldws,ma 4(0,%r20),%r3
+	ldws,ma 4(%r20),%r3
 	nop
 L$0006
 	; All gr restore are done.  Align the temporary frame pointer and
@@ -244,25 +244,25 @@ L$0006
 	subi 21,%r22,%r22
 	blr,n %r22,%r0
 	b,n L$0007
-	fldws,ma 8(0,%r20),%fr21
+	fldws,ma 8(%r20),%fr21
 	nop
-	fldws,ma 8(0,%r20),%fr20
+	fldws,ma 8(%r20),%fr20
 	nop
-	fldws,ma 8(0,%r20),%fr19
+	fldws,ma 8(%r20),%fr19
 	nop
-	fldws,ma 8(0,%r20),%fr18
+	fldws,ma 8(%r20),%fr18
 	nop
-	fldws,ma 8(0,%r20),%fr17
+	fldws,ma 8(%r20),%fr17
 	nop
-	fldws,ma 8(0,%r20),%fr16
+	fldws,ma 8(%r20),%fr16
 	nop
-	fldws,ma 8(0,%r20),%fr15
+	fldws,ma 8(%r20),%fr15
 	nop
-	fldws,ma 8(0,%r20),%fr14
+	fldws,ma 8(%r20),%fr14
 	nop
-	fldws,ma 8(0,%r20),%fr13
+	fldws,ma 8(%r20),%fr13
 	nop
-	fldws,ma 8(0,%r20),%fr12
+	fldws,ma 8(%r20),%fr12
 	nop
 L$0007
 	; Return and deallocate our frame.
diff --git a/gcc/config/pa/lib2funcs.asm b/gcc/config/pa/lib2funcs.asm
index cf57cbb9b92..e7a431ee6f8 100644
--- a/gcc/config/pa/lib2funcs.asm
+++ b/gcc/config/pa/lib2funcs.asm
@@ -50,7 +50,7 @@ __gcc_plt_call
 	.CALLINFO
 	.ENTRY
 	; Our return address comes in %r31, not %r2!
-	stw %r31,-8(0,%r30)
+	stw %r31,-8(%r30)
 
 	; An inline version of dyncall so we don't have to worry
 	; about long calls to millicode, PIC and other complexities.
@@ -63,7 +63,7 @@ L$foo
         mtsp %r1,%sr0
         ble 0(%sr0,%r22)
 	copy %r31,%r2
-	ldw -8(0,%r30),%r2
+	ldw -8(%r30),%r2
 
 	; We're going to be returning to a stack address, so we
 	; need to do an intra-space return.
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index ed1e43ed6e5..92f98ac3f7f 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -1661,8 +1661,8 @@ output_move_double (operands)
 		 register.  (We do this in a non-obvious way to
 		 save a register file writeback)  */
 	      if (GET_CODE (addr) == POST_INC)
-		return "stws,ma %1,8(0,%0)\n\tstw %R1,-4(0,%0)";
-	      return "stws,ma %1,-8(0,%0)\n\tstw %R1,12(0,%0)";
+		return "stws,ma %1,8(%0)\n\tstw %R1,-4(%0)";
+	      return "stws,ma %1,-8(%0)\n\tstw %R1,12(%0)";
 	    }
 	  else
 	    abort();
@@ -1681,8 +1681,8 @@ output_move_double (operands)
 		 register.  (We do this in a non-obvious way to
 		 save a register file writeback)  */
 	      if (GET_CODE (addr) == PRE_INC)
-		return "stws,mb %1,8(0,%0)\n\tstw %R1,4(0,%0)";
-	      return "stws,mb %1,-8(0,%0)\n\tstw %R1,4(0,%0)";
+		return "stws,mb %1,8(%0)\n\tstw %R1,4(%0)";
+	      return "stws,mb %1,-8(%0)\n\tstw %R1,4(%0)";
 	    }
 	  else
 	    abort();
@@ -1708,8 +1708,8 @@ output_move_double (operands)
 		 register.  (We do this in a non-obvious way to
 		 save a register file writeback)  */
 	      if (GET_CODE (addr) == POST_INC)
-		return "ldws,ma 8(0,%1),%0\n\tldw -4(0,%1),%R0";
-	      return "ldws,ma -8(0,%1),%0\n\tldw 12(0,%1),%R0";
+		return "ldws,ma 8(%1),%0\n\tldw -4(%1),%R0";
+	      return "ldws,ma -8(%1),%0\n\tldw 12(%1),%R0";
 	    }
 	  else
 	    {
@@ -1717,8 +1717,8 @@ output_move_double (operands)
 		 address register *and* update that register.  Probably
 		 we don't need to handle this at all.  */
 	      if (GET_CODE (addr) == POST_INC)
-		return "ldw 4(0,%1),%R0\n\tldws,ma 8(0,%1),%0";
-	      return "ldw 4(0,%1),%R0\n\tldws,ma -8(0,%1),%0";
+		return "ldw 4(%1),%R0\n\tldws,ma 8(%1),%0";
+	      return "ldw 4(%1),%R0\n\tldws,ma -8(%1),%0";
 	    }
 	}
       else if (GET_CODE (addr) == PRE_INC || GET_CODE (addr) == PRE_DEC)
@@ -1735,8 +1735,8 @@ output_move_double (operands)
 		 register.  (We do this in a non-obvious way to
 		 save a register file writeback)  */
 	      if (GET_CODE (addr) == PRE_INC)
-		return "ldws,mb 8(0,%1),%0\n\tldw 4(0,%1),%R0";
-	      return "ldws,mb -8(0,%1),%0\n\tldw 4(0,%1),%R0";
+		return "ldws,mb 8(%1),%0\n\tldw 4(%1),%R0";
+	      return "ldws,mb -8(%1),%0\n\tldw 4(%1),%R0";
 	    }
 	  else
 	    {
@@ -1744,8 +1744,8 @@ output_move_double (operands)
 		 address register *and* update that register.  Probably
 		 we don't need to handle this at all.  */
 	      if (GET_CODE (addr) == PRE_INC)
-		return "ldw 12(0,%1),%R0\n\tldws,mb 8(0,%1),%0";
-	      return "ldw -4(0,%1),%R0\n\tldws,mb -8(0,%1),%0";
+		return "ldw 12(%1),%R0\n\tldws,mb 8(%1),%0";
+	      return "ldw -4(%1),%R0\n\tldws,mb -8(%1),%0";
 	    }
 	}
       else if (GET_CODE (addr) == PLUS
@@ -1762,7 +1762,7 @@ output_move_double (operands)
 	      xoperands[2] = XEXP (XEXP (addr, 0), 0);
 	      xoperands[3] = XEXP (XEXP (addr, 0), 1);
 	      output_asm_insn ("sh%O3addl %2,%1,%0", xoperands);
-	      return "ldw 4(0,%0),%R0\n\tldw 0(0,%0),%0";
+	      return "ldw 4(%0),%R0\n\tldw 0(%0),%0";
 	    }
 	  else
 	    {
@@ -1773,7 +1773,7 @@ output_move_double (operands)
 	      xoperands[2] = XEXP (XEXP (addr, 0), 0);
 	      xoperands[3] = XEXP (XEXP (addr, 0), 1);
 	      output_asm_insn ("sh%O3addl %2,%1,%R0", xoperands);
-	      return "ldw 0(0,%R0),%0\n\tldw 4(0,%R0),%R0";
+	      return "ldw 0(%R0),%0\n\tldw 4(%R0),%R0";
 	    }
 	   
 	}
@@ -1967,11 +1967,11 @@ output_block_move (operands, size_is_constant)
 	output_asm_insn ("ldi %4,%2", operands);
 
 	/* Copying loop.  */
-	output_asm_insn ("ldws,ma 4(0,%1),%3", operands);
-	output_asm_insn ("ldws,ma 4(0,%1),%6", operands);
-	output_asm_insn ("stws,ma %3,4(0,%0)", operands);
+	output_asm_insn ("ldws,ma 4(%1),%3", operands);
+	output_asm_insn ("ldws,ma 4(%1),%6", operands);
+	output_asm_insn ("stws,ma %3,4(%0)", operands);
 	output_asm_insn ("addib,>= -8,%2,.-12", operands);
-	output_asm_insn ("stws,ma %6,4(0,%0)", operands);
+	output_asm_insn ("stws,ma %6,4(%0)", operands);
 
 	/* Handle the residual.  There could be up to 7 bytes of
 	   residual to copy!  */
@@ -1979,13 +1979,13 @@ output_block_move (operands, size_is_constant)
 	  {
 	    operands[4] = GEN_INT (n_bytes % 4);
 	    if (n_bytes % 8 >= 4)
-	      output_asm_insn ("ldws,ma 4(0,%1),%3", operands);
+	      output_asm_insn ("ldws,ma 4(%1),%3", operands);
 	    if (n_bytes % 4 != 0)
-	      output_asm_insn ("ldw 0(0,%1),%6", operands);
+	      output_asm_insn ("ldw 0(%1),%6", operands);
 	    if (n_bytes % 8 >= 4)
-	      output_asm_insn ("stws,ma %3,4(0,%0)", operands);
+	      output_asm_insn ("stws,ma %3,4(%0)", operands);
 	    if (n_bytes % 4 != 0)
-	      output_asm_insn ("stbys,e %6,%4(0,%0)", operands);
+	      output_asm_insn ("stbys,e %6,%4(%0)", operands);
 	  }
 	return "";
 
@@ -1995,23 +1995,23 @@ output_block_move (operands, size_is_constant)
 	output_asm_insn ("ldi %4,%2", operands);
 
 	/* Copying loop.  */
-	output_asm_insn ("ldhs,ma 2(0,%1),%3", operands);
-	output_asm_insn ("ldhs,ma 2(0,%1),%6", operands);
-	output_asm_insn ("sths,ma %3,2(0,%0)", operands);
+	output_asm_insn ("ldhs,ma 2(%1),%3", operands);
+	output_asm_insn ("ldhs,ma 2(%1),%6", operands);
+	output_asm_insn ("sths,ma %3,2(%0)", operands);
 	output_asm_insn ("addib,>= -4,%2,.-12", operands);
-	output_asm_insn ("sths,ma %6,2(0,%0)", operands);
+	output_asm_insn ("sths,ma %6,2(%0)", operands);
 
 	/* Handle the residual.  */
 	if (n_bytes % 4 != 0)
 	  {
 	    if (n_bytes % 4 >= 2)
-	      output_asm_insn ("ldhs,ma 2(0,%1),%3", operands);
+	      output_asm_insn ("ldhs,ma 2(%1),%3", operands);
 	    if (n_bytes % 2 != 0)
-	      output_asm_insn ("ldb 0(0,%1),%6", operands);
+	      output_asm_insn ("ldb 0(%1),%6", operands);
 	    if (n_bytes % 4 >= 2)
-	      output_asm_insn ("sths,ma %3,2(0,%0)", operands);
+	      output_asm_insn ("sths,ma %3,2(%0)", operands);
 	    if (n_bytes % 2 != 0)
-	      output_asm_insn ("stb %6,0(0,%0)", operands);
+	      output_asm_insn ("stb %6,0(%0)", operands);
 	  }
 	return "";
 
@@ -2021,17 +2021,17 @@ output_block_move (operands, size_is_constant)
 	output_asm_insn ("ldi %4,%2", operands);
 
 	/* Copying loop.  */
-	output_asm_insn ("ldbs,ma 1(0,%1),%3", operands);
-	output_asm_insn ("ldbs,ma 1(0,%1),%6", operands);
-	output_asm_insn ("stbs,ma %3,1(0,%0)", operands);
+	output_asm_insn ("ldbs,ma 1(%1),%3", operands);
+	output_asm_insn ("ldbs,ma 1(%1),%6", operands);
+	output_asm_insn ("stbs,ma %3,1(%0)", operands);
 	output_asm_insn ("addib,>= -2,%2,.-12", operands);
-	output_asm_insn ("stbs,ma %6,1(0,%0)", operands);
+	output_asm_insn ("stbs,ma %6,1(%0)", operands);
 
 	/* Handle the residual.  */
 	if (n_bytes % 2 != 0)
 	  {
-	    output_asm_insn ("ldb 0(0,%1),%3", operands);
-	    output_asm_insn ("stb %3,0(0,%0)", operands);
+	    output_asm_insn ("ldb 0(%1),%3", operands);
+	    output_asm_insn ("stb %3,0(%0)", operands);
 	  }
 	return "";
 
@@ -3883,21 +3883,21 @@ print_operand (file, x, code)
 	{
 	case PRE_DEC:
 	case POST_DEC:
-	  fprintf (file, "-%d(0,%s)", size, reg_names [REGNO (base)]);
+	  fprintf (file, "-%d(%s)", size, reg_names [REGNO (base)]);
 	  break;
 	case PRE_INC:
 	case POST_INC:
-	  fprintf (file, "%d(0,%s)", size, reg_names [REGNO (base)]);
+	  fprintf (file, "%d(%s)", size, reg_names [REGNO (base)]);
 	  break;
 	default:
 	  if (GET_CODE (XEXP (x, 0)) == PLUS
 	      && GET_CODE (XEXP (XEXP (x, 0), 0)) == MULT)
-	    fprintf (file, "%s(0,%s)",
+	    fprintf (file, "%s(%s)",
 		     reg_names [REGNO (XEXP (XEXP (XEXP (x, 0), 0), 0))],
 		     reg_names [REGNO (XEXP (XEXP (x, 0), 1))]);
 	  else if (GET_CODE (XEXP (x, 0)) == PLUS
 		   && GET_CODE (XEXP (XEXP (x, 0), 1)) == MULT)
-	    fprintf (file, "%s(0,%s)",
+	    fprintf (file, "%s(%s)",
 		     reg_names [REGNO (XEXP (XEXP (XEXP (x, 0), 1), 0))],
 		     reg_names [REGNO (XEXP (XEXP (x, 0), 0))]);
 	  else
@@ -4888,10 +4888,10 @@ output_dbra (operands, insn, which_alternative)
 	return "ldo %1(%0),%0";
       else if (which_alternative == 1)
 	{
-	  output_asm_insn ("fstws %0,-16(0,%%r30)",operands);
-	  output_asm_insn ("ldw -16(0,%%r30),%4",operands);
-	  output_asm_insn ("ldo %1(%4),%4\n\tstw %4,-16(0,%%r30)", operands);
-	  return "fldws -16(0,%%r30),%0";
+	  output_asm_insn ("fstws %0,-16(%%r30)",operands);
+	  output_asm_insn ("ldw -16(%%r30),%4",operands);
+	  output_asm_insn ("ldo %1(%4),%4\n\tstw %4,-16(%%r30)", operands);
+	  return "fldws -16(%%r30),%0";
 	}
       else
 	{
@@ -4953,12 +4953,12 @@ output_dbra (operands, insn, which_alternative)
       /* Move loop counter from FP register to MEM then into a GR,
 	 increment the GR, store the GR into MEM, and finally reload
 	 the FP register from MEM from within the branch's delay slot.  */
-      output_asm_insn ("fstws %0,-16(0,%%r30)\n\tldw -16(0,%%r30),%4",operands);
-      output_asm_insn ("ldo %1(%4),%4\n\tstw %4,-16(0,%%r30)", operands);
+      output_asm_insn ("fstws %0,-16(%%r30)\n\tldw -16(%%r30),%4",operands);
+      output_asm_insn ("ldo %1(%4),%4\n\tstw %4,-16(%%r30)", operands);
       if (get_attr_length (insn) == 24)
-	return "comb,%S2 0,%4,%3\n\tfldws -16(0,%%r30),%0";
+	return "comb,%S2 0,%4,%3\n\tfldws -16(%%r30),%0";
       else
-	return "comclr,%B2 0,%4,0\n\tbl %3,0\n\tfldws -16(0,%%r30),%0";
+	return "comclr,%B2 0,%4,0\n\tbl %3,0\n\tfldws -16(%%r30),%0";
     }
   /* Deal with gross reload from memory case.  */
   else
@@ -4994,8 +4994,8 @@ output_movb (operands, insn, which_alternative, reverse_comparison)
 	return "copy %1,%0";
       else if (which_alternative == 1)
 	{
-	  output_asm_insn ("stw %1,-16(0,%%r30)",operands);
-	  return "fldws -16(0,%%r30),%0";
+	  output_asm_insn ("stw %1,-16(%%r30)",operands);
+	  return "fldws -16(%%r30),%0";
 	}
       else if (which_alternative == 2)
 	return "stw %1,%0";
@@ -5060,11 +5060,11 @@ output_movb (operands, insn, which_alternative, reverse_comparison)
       /* Move loop counter from FP register to MEM then into a GR,
 	 increment the GR, store the GR into MEM, and finally reload
 	 the FP register from MEM from within the branch's delay slot.  */
-      output_asm_insn ("stw %1,-16(0,%%r30)",operands);
+      output_asm_insn ("stw %1,-16(%%r30)",operands);
       if (get_attr_length (insn) == 12)
-	return "comb,%S2 0,%1,%3\n\tfldws -16(0,%%r30),%0";
+	return "comb,%S2 0,%1,%3\n\tfldws -16(%%r30),%0";
       else
-	return "comclr,%B2 0,%1,0\n\tbl %3,0\n\tfldws -16(0,%%r30),%0";
+	return "comclr,%B2 0,%1,0\n\tbl %3,0\n\tfldws -16(%%r30),%0";
     }
   /* Deal with gross reload from memory case.  */
   else if (which_alternative == 2)
@@ -5402,7 +5402,7 @@ output_call (insn, call_dest)
 
 	      output_asm_insn ("addil LT%%%0,%%r19", xoperands);
 	      output_asm_insn ("ldw RT%%%0(%%r1),%%r22", xoperands);
-	      output_asm_insn ("ldw 0(0,%%r22),%%r22", xoperands);
+	      output_asm_insn ("ldw 0(%%r22),%%r22", xoperands);
 
 	      /* Get our address + 8 into %r1.  */
 	      output_asm_insn ("bl .+8,%%r1", xoperands);
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index f0df502f247..eeabab61c7b 100644
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -1320,15 +1320,15 @@ extern union tree_node *current_function_decl;
 
 #define TRAMPOLINE_TEMPLATE(FILE) \
   {							\
-    fputs ("\tldw	36(0,%r22),%r21\n", FILE);	\
+    fputs ("\tldw	36(%r22),%r21\n", FILE);	\
     fputs ("\tbb,>=,n	%r21,30,.+16\n", FILE);	\
     fputs ("\tdepi	0,31,2,%r21\n", FILE);		\
-    fputs ("\tldw	4(0,%r21),%r19\n", FILE);	\
-    fputs ("\tldw	0(0,%r21),%r21\n", FILE);	\
-    fputs ("\tldsid	(0,%r21),%r1\n", FILE);	\
+    fputs ("\tldw	4(%r21),%r19\n", FILE);	\
+    fputs ("\tldw	0(%r21),%r21\n", FILE);	\
+    fputs ("\tldsid	(%r21),%r1\n", FILE);	\
     fputs ("\tmtsp	%r1,%sr0\n", FILE);		\
     fputs ("\tbe	0(%sr0,%r21)\n", FILE);	\
-    fputs ("\tldw	40(0,%r22),%r29\n", FILE);	\
+    fputs ("\tldw	40(%r22),%r29\n", FILE);	\
     fputs ("\t.word	0\n", FILE);			\
     fputs ("\t.word	0\n", FILE);			\
   }
@@ -2429,7 +2429,7 @@ DTORS_SECTION_FUNCTION
   switch (GET_CODE (addr))						\
     {									\
     case REG:								\
-      fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]);		\
+      fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]);		\
       break;								\
     case PLUS:								\
       if (GET_CODE (XEXP (addr, 0)) == CONST_INT)			\
@@ -2438,7 +2438,7 @@ DTORS_SECTION_FUNCTION
 	offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);	\
       else								\
 	abort ();							\
-      fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]);	\
+      fprintf (FILE, "%d(%s)", offset, reg_names [REGNO (base)]);	\
       break;								\
     case LO_SUM:							\
       if (!symbolic_operand (XEXP (addr, 1)))				\
@@ -2455,7 +2455,7 @@ DTORS_SECTION_FUNCTION
       fputs (")", FILE);						\
       break;								\
     case CONST_INT:							\
-      fprintf (FILE, "%d(0,0)", INTVAL (addr));				\
+      fprintf (FILE, "%d(%r0)", INTVAL (addr));				\
       break;								\
     default:								\
       output_addr_const (FILE, addr);					\
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index 3601c9ef6c9..38ef038ba40 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -1450,9 +1450,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[2] == hard_frame_pointer_rtx
       || operands[2] == stack_pointer_rtx)
-    return \"ldwx %1(0,%2),%0\";
+    return \"ldwx %1(%2),%0\";
   else
-    return \"ldwx %2(0,%1),%0\";
+    return \"ldwx %2(%1),%0\";
 }"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
@@ -1469,9 +1469,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[1] == hard_frame_pointer_rtx
       || operands[1] == stack_pointer_rtx)
-    return \"ldwx %2(0,%1),%0\";
+    return \"ldwx %2(%1),%0\";
   else
-    return \"ldwx %1(0,%2),%0\";
+    return \"ldwx %1(%2),%0\";
 }"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
@@ -1488,8 +1488,8 @@
   "*
 {
   if (INTVAL (operands[2]) < 0)
-    return \"ldwm %2(0,%1),%0\";
-  return \"ldws,mb %2(0,%1),%0\";
+    return \"ldwm %2(%1),%0\";
+  return \"ldws,mb %2(%1),%0\";
 }"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
@@ -1504,8 +1504,8 @@
   "*
 {
   if (INTVAL (operands[1]) < 0)
-    return \"stwm %r2,%1(0,%0)\";
-  return \"stws,mb %r2,%1(0,%0)\";
+    return \"stwm %r2,%1(%0)\";
+  return \"stws,mb %r2,%1(%0)\";
 }"
   [(set_attr "type" "store")
    (set_attr "length" "4")])
@@ -1520,8 +1520,8 @@
   "*
 {
   if (INTVAL (operands[2]) > 0)
-    return \"ldwm %2(0,%1),%0\";
-  return \"ldws,ma %2(0,%1),%0\";
+    return \"ldwm %2(%1),%0\";
+  return \"ldws,ma %2(%1),%0\";
 }"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
@@ -1536,8 +1536,8 @@
   "*
 {
   if (INTVAL (operands[2]) > 0)
-    return \"stwm %r1,%2(0,%0)\";
-  return \"stws,ma %r1,%2(0,%0)\";
+    return \"stwm %r1,%2(%0)\";
+  return \"stws,ma %r1,%2(%0)\";
 }"
   [(set_attr "type" "store")
    (set_attr "length" "4")])
@@ -1785,9 +1785,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[2] == hard_frame_pointer_rtx
       || operands[2] == stack_pointer_rtx)
-    return \"ldhx %1(0,%2),%0\";
+    return \"ldhx %1(%2),%0\";
   else
-    return \"ldhx %2(0,%1),%0\";
+    return \"ldhx %2(%1),%0\";
 }"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
@@ -1804,9 +1804,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[1] == hard_frame_pointer_rtx
       || operands[1] == stack_pointer_rtx)
-    return \"ldhx %2(0,%1),%0\";
+    return \"ldhx %2(%1),%0\";
   else
-    return \"ldhx %1(0,%2),%0\";
+    return \"ldhx %1(%2),%0\";
 }"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
@@ -1826,9 +1826,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[2] == hard_frame_pointer_rtx
       || operands[2] == stack_pointer_rtx)
-    return \"ldhx %1(0,%2),%0\";
+    return \"ldhx %1(%2),%0\";
   else
-    return \"ldhx %2(0,%1),%0\";
+    return \"ldhx %2(%1),%0\";
 }"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
@@ -1847,9 +1847,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[1] == hard_frame_pointer_rtx
       || operands[1] == stack_pointer_rtx)
-    return \"ldhx %2(0,%1),%0\";
+    return \"ldhx %2(%1),%0\";
   else
-    return \"ldhx %1(0,%2),%0\";
+    return \"ldhx %1(%2),%0\";
 }"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
@@ -1861,7 +1861,7 @@
    (set (match_dup 1)
 	(plus:SI (match_dup 1) (match_dup 2)))]
   ""
-  "ldhs,mb %2(0,%1),%0"
+  "ldhs,mb %2(%1),%0"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
 
@@ -1875,7 +1875,7 @@
    (set (match_dup 1)
 	(plus:SI (match_dup 1) (match_dup 2)))]
   ""
-  "ldhs,mb %2(0,%1),%0"
+  "ldhs,mb %2(%1),%0"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
 
@@ -1886,7 +1886,7 @@
    (set (match_dup 0)
 	(plus:SI (match_dup 0) (match_dup 1)))]
   ""
-  "sths,mb %r2,%1(0,%0)"
+  "sths,mb %r2,%1(%0)"
   [(set_attr "type" "store")
    (set_attr "length" "4")])
 
@@ -1947,9 +1947,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[2] == hard_frame_pointer_rtx
       || operands[2] == stack_pointer_rtx)
-    return \"ldbx %1(0,%2),%0\";
+    return \"ldbx %1(%2),%0\";
   else
-    return \"ldbx %2(0,%1),%0\";
+    return \"ldbx %2(%1),%0\";
 }"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
@@ -1966,9 +1966,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[1] == hard_frame_pointer_rtx
       || operands[1] == stack_pointer_rtx)
-    return \"ldbx %2(0,%1),%0\";
+    return \"ldbx %2(%1),%0\";
   else
-    return \"ldbx %1(0,%2),%0\";
+    return \"ldbx %1(%2),%0\";
 }"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
@@ -1988,9 +1988,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[2] == hard_frame_pointer_rtx
       || operands[2] == stack_pointer_rtx)
-    return \"ldbx %1(0,%2),%0\";
+    return \"ldbx %1(%2),%0\";
   else
-    return \"ldbx %2(0,%1),%0\";
+    return \"ldbx %2(%1),%0\";
 }"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
@@ -2009,9 +2009,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[1] == hard_frame_pointer_rtx
       || operands[1] == stack_pointer_rtx)
-    return \"ldbx %2(0,%1),%0\";
+    return \"ldbx %2(%1),%0\";
   else
-    return \"ldbx %1(0,%2),%0\";
+    return \"ldbx %1(%2),%0\";
 }"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
@@ -2030,9 +2030,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[2] == hard_frame_pointer_rtx
       || operands[2] == stack_pointer_rtx)
-    return \"ldbx %1(0,%2),%0\";
+    return \"ldbx %1(%2),%0\";
   else
-    return \"ldbx %2(0,%1),%0\";
+    return \"ldbx %2(%1),%0\";
 }"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
@@ -2051,9 +2051,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[1] == hard_frame_pointer_rtx
       || operands[1] == stack_pointer_rtx)
-    return \"ldbx %2(0,%1),%0\";
+    return \"ldbx %2(%1),%0\";
   else
-    return \"ldbx %1(0,%2),%0\";
+    return \"ldbx %1(%2),%0\";
 }"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
@@ -2064,7 +2064,7 @@
 			 (match_operand:SI 2 "int5_operand" "L"))))
    (set (match_dup 1) (plus:SI (match_dup 1) (match_dup 2)))]
   ""
-  "ldbs,mb %2(0,%1),%0"
+  "ldbs,mb %2(%1),%0"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
 
@@ -2076,7 +2076,7 @@
 				  (match_operand:SI 2 "int5_operand" "L")))))
    (set (match_dup 1) (plus:SI (match_dup 1) (match_dup 2)))]
   ""
-  "ldbs,mb %2(0,%1),%0"
+  "ldbs,mb %2(%1),%0"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
 
@@ -2087,7 +2087,7 @@
 				  (match_operand:SI 2 "int5_operand" "L")))))
    (set (match_dup 1) (plus:SI (match_dup 1) (match_dup 2)))]
   ""
-  "ldbs,mb %2(0,%1),%0"
+  "ldbs,mb %2(%1),%0"
   [(set_attr "type" "load")
    (set_attr "length" "4")])
 
@@ -2098,7 +2098,7 @@
    (set (match_dup 0)
 	(plus:SI (match_dup 0) (match_dup 1)))]
   ""
-  "stbs,mb %r2,%1(0,%0)"
+  "stbs,mb %r2,%1(%0)"
   [(set_attr "type" "store")
    (set_attr "length" "4")])
 
@@ -2305,9 +2305,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[2] == hard_frame_pointer_rtx
       || operands[2] == stack_pointer_rtx)
-    return \"flddx %1(0,%2),%0\";
+    return \"flddx %1(%2),%0\";
   else
-    return \"flddx %2(0,%1),%0\";
+    return \"flddx %2(%1),%0\";
 }"
   [(set_attr "type" "fpload")
    (set_attr "length" "4")])
@@ -2324,9 +2324,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[1] == hard_frame_pointer_rtx
       || operands[1] == stack_pointer_rtx)
-    return \"flddx %2(0,%1),%0\";
+    return \"flddx %2(%1),%0\";
   else
-    return \"flddx %1(0,%2),%0\";
+    return \"flddx %1(%2),%0\";
 }"
   [(set_attr "type" "fpload")
    (set_attr "length" "4")])
@@ -2343,9 +2343,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[2] == hard_frame_pointer_rtx
       || operands[2] == stack_pointer_rtx)
-    return \"fstdx %0,%1(0,%2)\";
+    return \"fstdx %0,%1(%2)\";
   else
-    return \"fstdx %0,%2(0,%1)\";
+    return \"fstdx %0,%2(%1)\";
 }"
   [(set_attr "type" "fpstore")
    (set_attr "length" "4")])
@@ -2362,9 +2362,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[1] == hard_frame_pointer_rtx
       || operands[1] == stack_pointer_rtx)
-    return \"fstdx %0,%2(0,%1)\";
+    return \"fstdx %0,%2(%1)\";
   else
-    return \"fstdx %0,%1(0,%2)\";
+    return \"fstdx %0,%1(%2)\";
 }"
   [(set_attr "type" "fpstore")
    (set_attr "length" "4")])
@@ -2610,9 +2610,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[2] == hard_frame_pointer_rtx
       || operands[2] == stack_pointer_rtx)
-    return \"fldwx %1(0,%2),%0\";
+    return \"fldwx %1(%2),%0\";
   else
-    return \"fldwx %2(0,%1),%0\";
+    return \"fldwx %2(%1),%0\";
 }"
   [(set_attr "type" "fpload")
    (set_attr "length" "4")])
@@ -2629,9 +2629,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[1] == hard_frame_pointer_rtx
       || operands[1] == stack_pointer_rtx)
-    return \"fldwx %2(0,%1),%0\";
+    return \"fldwx %2(%1),%0\";
   else
-    return \"fldwx %1(0,%2),%0\";
+    return \"fldwx %1(%2),%0\";
 }"
   [(set_attr "type" "fpload")
    (set_attr "length" "4")])
@@ -2648,9 +2648,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[2] == hard_frame_pointer_rtx
       || operands[2] == stack_pointer_rtx)
-    return \"fstwx %0,%1(0,%2)\";
+    return \"fstwx %0,%1(%2)\";
   else
-    return \"fstwx %0,%2(0,%1)\";
+    return \"fstwx %0,%2(%1)\";
 }"
   [(set_attr "type" "fpstore")
    (set_attr "length" "4")])
@@ -2667,9 +2667,9 @@
      pseudos that don't get hard registers.  Deal with it.  */
   if (operands[1] == hard_frame_pointer_rtx
       || operands[1] == stack_pointer_rtx)
-    return \"fstwx %0,%2(0,%1)\";
+    return \"fstwx %0,%2(%1)\";
   else
-    return \"fstwx %0,%1(0,%2)\";
+    return \"fstwx %0,%1(%2)\";
 }"
   [(set_attr "type" "fpstore")
    (set_attr "length" "4")])
@@ -5039,7 +5039,7 @@
    (use (mem:SI (match_operand:SI 0 "register_operand" "r")))
    (use (mem:SI (match_operand:SI 1 "register_operand" "r")))]
   ""
-  "fdc 0(0,%0)\;fdc 0(0,%1)\;sync"
+  "fdc 0(%0)\;fdc 0(%1)\;sync"
   [(set_attr "type" "multi")
    (set_attr "length" "12")])
 
@@ -5051,7 +5051,7 @@
    (clobber (match_operand:SI 3 "register_operand" "=&r"))
    (clobber (match_operand:SI 4 "register_operand" "=&r"))]
   ""
-  "mfsp %%sr0,%4\;ldsid (0,%2),%3\;mtsp %3,%%sr0\;fic 0(%%sr0,%0)\;fic 0(%%sr0,%1)\;sync\;mtsp %4,%%sr0\;nop\;nop\;nop\;nop\;nop\;nop"
+  "mfsp %%sr0,%4\;ldsid (%2),%3\;mtsp %3,%%sr0\;fic 0(%%sr0,%0)\;fic 0(%%sr0,%1)\;sync\;mtsp %4,%%sr0\;nop\;nop\;nop\;nop\;nop\;nop"
   [(set_attr "type" "multi")
    (set_attr "length" "52")])
 
-- 
2.30.2