From d34b7d7a6b1832fa74373cade6009baf0da67070 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Sat, 14 Mar 2015 00:27:24 +0100 Subject: [PATCH] mibuild/xilinx: remove obsolete CRG_DS --- mibuild/xilinx/common.py | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/mibuild/xilinx/common.py b/mibuild/xilinx/common.py index 9b5d9943..a7b1175c 100644 --- a/mibuild/xilinx/common.py +++ b/mibuild/xilinx/common.py @@ -29,22 +29,6 @@ def settings(path, ver=None, sub=None): raise OSError("no settings file found") -class CRG_DS(Module): - def __init__(self, platform, clk_name, rst_name, rst_invert=False): - reset_less = rst_name is None - self.clock_domains.cd_sys = ClockDomain(reset_less=reset_less) - self._clk = platform.request(clk_name) - self.specials += Instance("IBUFGDS", - Instance.Input("I", self._clk.p), - Instance.Input("IB", self._clk.n), - Instance.Output("O", self.cd_sys.clk) - ) - if not reset_less: - if rst_invert: - self.comb += self.cd_sys.rst.eq(~platform.request(rst_name)) - else: - self.comb += self.cd_sys.rst.eq(platform.request(rst_name)) - class XilinxNoRetimingImpl(Module): def __init__(self, reg): self.specials += SynthesisDirective("attribute register_balancing of {r} is no", r=reg) -- 2.30.2