From d34f510e2bf976cff3b9fbf7a8c5a41c233db2e4 Mon Sep 17 00:00:00 2001 From: Srinath Parvathaneni Date: Thu, 4 Jun 2020 15:29:18 +0100 Subject: [PATCH] [PATCH][GCC] arm: Fix the MVE ACLE vbicq intrinsics. Following MVE intrinsic testcases are failing in GCC testsuite. Directory: gcc.target/arm/mve/intrinsics/ Testcases: vbicq_f16.c, vbicq_f32.c, vbicq_s16.c, vbicq_s32.c, vbicq_s8.c ,vbicq_u16.c, vbicq_u32.c and vbicq_u8.c. This patch fixes the vbicq intrinsics by modifying the intrinsic parameters and polymorphic variants in "arm_mve.h" header file. Thanks, Srinath. gcc/ChangeLog: 2020-05-20 Srinath Parvathaneni * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic arguments. (__arm_vbicq_n_s16): Likewise. (__arm_vbicq_n_u32): Likewise. (__arm_vbicq_n_s32): Likewise. (__arm_vbicq): Modify polymorphic variant. gcc/testsuite/ChangeLog: 2020-05-20 Srinath Parvathaneni * gcc.target/arm/mve/intrinsics/vbicq_f16.c: Modify. * gcc.target/arm/mve/intrinsics/vbicq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_u8.c: Likewise. --- gcc/config/arm/arm_mve.h | 32 +++++++++---------- .../gcc.target/arm/mve/intrinsics/vbicq_f16.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_f32.c | 1 + .../arm/mve/intrinsics/vbicq_n_s16.c | 1 + .../arm/mve/intrinsics/vbicq_n_s32.c | 1 + .../arm/mve/intrinsics/vbicq_n_u16.c | 1 + .../arm/mve/intrinsics/vbicq_n_u32.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_s16.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_s32.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_s8.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_u16.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_u32.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_u8.c | 1 + 13 files changed, 28 insertions(+), 16 deletions(-) diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h index 1002512a98f..9bc5c97db8f 100644 --- a/gcc/config/arm/arm_mve.h +++ b/gcc/config/arm/arm_mve.h @@ -6361,7 +6361,7 @@ __arm_vorrq_n_u16 (uint16x8_t __a, const int __imm) __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vbicq_n_u16 (uint16x8_t __a, const uint16_t __imm) +__arm_vbicq_n_u16 (uint16x8_t __a, const int __imm) { return __builtin_mve_vbicq_n_uv8hi (__a, __imm); } @@ -6473,7 +6473,7 @@ __arm_vorrq_n_s16 (int16x8_t __a, const int __imm) __extension__ extern __inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vbicq_n_s16 (int16x8_t __a, const int16_t __imm) +__arm_vbicq_n_s16 (int16x8_t __a, const int __imm) { return __builtin_mve_vbicq_n_sv8hi (__a, __imm); } @@ -6564,7 +6564,7 @@ __arm_vorrq_n_u32 (uint32x4_t __a, const int __imm) __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vbicq_n_u32 (uint32x4_t __a, const uint32_t __imm) +__arm_vbicq_n_u32 (uint32x4_t __a, const int __imm) { return __builtin_mve_vbicq_n_uv4si (__a, __imm); } @@ -6676,7 +6676,7 @@ __arm_vorrq_n_s32 (int32x4_t __a, const int __imm) __extension__ extern __inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vbicq_n_s32 (int32x4_t __a, const int32_t __imm) +__arm_vbicq_n_s32 (int32x4_t __a, const int __imm) { return __builtin_mve_vbicq_n_sv4si (__a, __imm); } @@ -23182,7 +23182,7 @@ __arm_vorrq (uint16x8_t __a, const int __imm) __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vbicq (uint16x8_t __a, const uint16_t __imm) +__arm_vbicq (uint16x8_t __a, const int __imm) { return __arm_vbicq_n_u16 (__a, __imm); } @@ -23294,7 +23294,7 @@ __arm_vorrq (int16x8_t __a, const int __imm) __extension__ extern __inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vbicq (int16x8_t __a, const int16_t __imm) +__arm_vbicq (int16x8_t __a, const int __imm) { return __arm_vbicq_n_s16 (__a, __imm); } @@ -23385,7 +23385,7 @@ __arm_vorrq (uint32x4_t __a, const int __imm) __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vbicq (uint32x4_t __a, const uint32_t __imm) +__arm_vbicq (uint32x4_t __a, const int __imm) { return __arm_vbicq_n_u32 (__a, __imm); } @@ -23497,7 +23497,7 @@ __arm_vorrq (int32x4_t __a, const int __imm) __extension__ extern __inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_vbicq (int32x4_t __a, const int32_t __imm) +__arm_vbicq (int32x4_t __a, const int __imm) { return __arm_vbicq_n_s32 (__a, __imm); } @@ -35963,10 +35963,10 @@ extern void *__ARM_undef; #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), (const int16_t) __p1), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), (const int32_t) __p1), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (const uint16_t) __p1), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (const uint32_t) __p1), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1 (__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1 (__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1 (__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1 (__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ @@ -38875,10 +38875,10 @@ extern void *__ARM_undef; #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ __typeof(p1) __p1 = (p1); \ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ - int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), (const int16_t) __p1), \ - int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), (const int32_t) __p1), \ - int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (const uint16_t) __p1), \ - int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (const uint32_t) __p1), \ + int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1 (__p1, int)), \ + int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1 (__p1, int)), \ + int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1 (__p1, int)), \ + int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1 (__p1, int)), \ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c index eed2bc7951e..c15f1f91d07 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c @@ -19,3 +19,4 @@ foo1 (float16x8_t a, float16x8_t b) } /* { dg-final { scan-assembler "vbic" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c index 5e543dc87a1..c8659d460a0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c @@ -19,3 +19,4 @@ foo1 (float32x4_t a, float32x4_t b) } /* { dg-final { scan-assembler "vbic" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c index ecc48503fc2..6258727d82f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c @@ -17,3 +17,4 @@ foo1 (int16x8_t a) } /* { dg-final { scan-assembler-times "vbic.i16" 2 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c index 013cdf15cfd..be641abf556 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c @@ -17,3 +17,4 @@ foo1 (int32x4_t a) } /* { dg-final { scan-assembler-times "vbic.i32" 2 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c index b24db154ad8..0b26ffda0dc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c @@ -17,3 +17,4 @@ foo1 (uint16x8_t a) } /* { dg-final { scan-assembler-times "vbic.i16" 2 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c index 1261fbb523c..47820bd184a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c @@ -17,3 +17,4 @@ foo1 (uint32x4_t a) } /* { dg-final { scan-assembler-times "vbic.i32" 2 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c index fe4f15e4bc2..4ffacdd9733 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c @@ -19,3 +19,4 @@ foo1 (int16x8_t a, int16x8_t b) } /* { dg-final { scan-assembler "vbic" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c index 969ccaed426..13fbff40746 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c @@ -19,3 +19,4 @@ foo1 (int32x4_t a, int32x4_t b) } /* { dg-final { scan-assembler "vbic" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c index c1092dd194d..b9fba943a83 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c @@ -19,3 +19,4 @@ foo1 (int8x16_t a, int8x16_t b) } /* { dg-final { scan-assembler "vbic" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c index f2856da1ccf..5d94a6396c4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c @@ -19,3 +19,4 @@ foo1 (uint16x8_t a, uint16x8_t b) } /* { dg-final { scan-assembler "vbic" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c index 17c3990dde6..893dc3deefc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c @@ -19,3 +19,4 @@ foo1 (uint32x4_t a, uint32x4_t b) } /* { dg-final { scan-assembler "vbic" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c index e5da270ccda..bd5e9bc0197 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c @@ -19,3 +19,4 @@ foo1 (uint8x16_t a, uint8x16_t b) } /* { dg-final { scan-assembler "vbic" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -- 2.30.2