From d36b25c54867fc64e888efa17c2dd01d2b2b6f5d Mon Sep 17 00:00:00 2001 From: Will Schmidt Date: Fri, 23 Feb 2018 16:46:00 +0000 Subject: [PATCH] [testsuite] 2018-02-23 Will Schmidt * fold-vec-mult-int128-p9.c: Add maddld insn to expected output. From-SVN: r257935 --- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index dfe208d7fdd..88f2c0c50a5 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-02-23 Will Schmidt + + * gcc.target/powerpc/fold-vec-mult-int128-p9.c: Add maddld insn to + expected output. + 2018-02-23 Paul Thomas PR fortran/83149 diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c index 657188435d4..5d3d4aaf972 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c @@ -22,5 +22,5 @@ test2 (vector unsigned __int128 x, vector unsigned __int128 y) return vec_mul (x, y); } -/* { dg-final { scan-assembler-times {\mmulld\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mmulld\M|\mmaddld\M} 6 } } */ /* { dg-final { scan-assembler-times {\mmulhdu\M} 2 } } */ -- 2.30.2