From d379a08b27df44dbbacca09f8180196e9acb6431 Mon Sep 17 00:00:00 2001 From: Jing Qu Date: Mon, 16 Sep 2019 18:30:28 -0500 Subject: [PATCH] gpu-compute: Fix overriden errors When building Gem5 with GPU protocols, overriden errors were thrown from files in gpu-compute. After adding override to the files, the errors were resolved and Gem5 builds successfully. Change-Id: Iab3a0768caf82c226e8bbee5690a834bf92d1e03 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20939 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- src/gpu-compute/compute_unit.hh | 4 ++-- src/gpu-compute/dispatcher.hh | 10 +++++----- src/gpu-compute/gpu_tlb.hh | 6 +++--- src/gpu-compute/tlb_coalescer.hh | 2 +- 4 files changed, 11 insertions(+), 11 deletions(-) diff --git a/src/gpu-compute/compute_unit.hh b/src/gpu-compute/compute_unit.hh index adf3c21d2..051a5f2ff 100644 --- a/src/gpu-compute/compute_unit.hh +++ b/src/gpu-compute/compute_unit.hh @@ -280,7 +280,7 @@ class ComputeUnit : public ClockedObject bool cedeSIMD(int simdId, int wfSlotId); template void doSmReturn(GPUDynInstPtr gpuDynInst); - virtual void init(); + virtual void init() override; void sendRequest(GPUDynInstPtr gpuDynInst, int index, PacketPtr pkt); void sendSyncRequest(GPUDynInstPtr gpuDynInst, int index, PacketPtr pkt); void injectGlobalMemFence(GPUDynInstPtr gpuDynInst, @@ -380,7 +380,7 @@ class ComputeUnit : public ClockedObject int glbMemInstAvail; void - regStats(); + regStats() override; LdsState & getLds() const diff --git a/src/gpu-compute/dispatcher.hh b/src/gpu-compute/dispatcher.hh index 17dc5a5cc..9d21a22b7 100644 --- a/src/gpu-compute/dispatcher.hh +++ b/src/gpu-compute/dispatcher.hh @@ -103,8 +103,8 @@ class GpuDispatcher : public DmaDevice ~GpuDispatcher() { } void exec(); - virtual void serialize(CheckpointOut &cp) const; - virtual void unserialize(CheckpointIn &cp); + virtual void serialize(CheckpointOut &cp) const override; + virtual void unserialize(CheckpointIn &cp) override; void notifyWgCompl(Wavefront *w); void scheduleDispatch(); void accessUserVar(BaseCPU *cpu, uint64_t addr, int val, int off); @@ -143,9 +143,9 @@ class GpuDispatcher : public DmaDevice Port &getPort(const std::string &if_name, PortID idx=InvalidPortID) override; - AddrRangeList getAddrRanges() const; - Tick read(PacketPtr pkt); - Tick write(PacketPtr pkt); + AddrRangeList getAddrRanges() const override; + Tick read(PacketPtr pkt) override; + Tick write(PacketPtr pkt) override; // helper functions to retrieve/set GPU attributes int getNumCUs(); diff --git a/src/gpu-compute/gpu_tlb.hh b/src/gpu-compute/gpu_tlb.hh index 766d2d1b9..2abaabeff 100644 --- a/src/gpu-compute/gpu_tlb.hh +++ b/src/gpu-compute/gpu_tlb.hh @@ -217,7 +217,7 @@ namespace X86ISA // the avg. over all pages. Stats::Scalar avgReuseDistance; - void regStats(); + void regStats() override; void updatePageFootprint(Addr virt_page_addr); void printAccessPattern(); @@ -235,8 +235,8 @@ namespace X86ISA TlbEntry *insert(Addr vpn, TlbEntry &entry); // Checkpointing - virtual void serialize(CheckpointOut& cp) const; - virtual void unserialize(CheckpointIn& cp); + virtual void serialize(CheckpointOut& cp) const override; + virtual void unserialize(CheckpointIn& cp) override; void issueTranslation(); enum tlbOutcome {TLB_HIT, TLB_MISS, PAGE_WALK, MISS_RETURN}; bool tlbLookup(const RequestPtr &req, diff --git a/src/gpu-compute/tlb_coalescer.hh b/src/gpu-compute/tlb_coalescer.hh index b65f1b0fb..f03500346 100644 --- a/src/gpu-compute/tlb_coalescer.hh +++ b/src/gpu-compute/tlb_coalescer.hh @@ -143,7 +143,7 @@ class TLBCoalescer : public ClockedObject bool canCoalesce(PacketPtr pkt1, PacketPtr pkt2); void updatePhysAddresses(PacketPtr pkt); - void regStats(); + void regStats() override; // Clock related functions. Maps to-and-from // Simulation ticks and object clocks. -- 2.30.2