From d426f92aa09ea8e7a603312de3164ef1c01dc323 Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 17 Dec 2020 12:50:30 +0000 Subject: [PATCH] --- openpower/sv/svp_rewrite/svp64.mdwn | 1 + 1 file changed, 1 insertion(+) diff --git a/openpower/sv/svp_rewrite/svp64.mdwn b/openpower/sv/svp_rewrite/svp64.mdwn index 02d3df394..c2cc7d20a 100644 --- a/openpower/sv/svp_rewrite/svp64.mdwn +++ b/openpower/sv/svp_rewrite/svp64.mdwn @@ -64,6 +64,7 @@ Shows all fields in the Remapped Encoding `RM[0:23]` for all instruction variant * `RM-1P-3S1D` Single Predication dest/src1/2/3, applies to 4-operand instructions (fmadd, isel, madd). * `RM-1P-2S1D` Single Predication dest/src1/2 applies to 3-operand instructions (src1 src2 dest) * `RM-2P-1S1D` Twin Predication (src=1, dest=1) +* `RM-2P-2S1D` Twin Predication (src=2, dest=1) primarily for LDST ## RM-1P-3S1D -- 2.30.2