From d4340f89eccb0b0a0811e142ce365efc48beb064 Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Thu, 5 Dec 2019 08:43:03 +0100 Subject: [PATCH] Arm64: correct "sha3" arch-extension directive handling SHA2 is a prereq to SHA3, not part of it aiui. Hence disabling the latter should not also disable the former. In the course of adding respective tests also do away with the duplication of crypto.d's contents in crypto-directive.d. --- gas/ChangeLog | 12 +++++++ gas/config/tc-aarch64.c | 5 ++- gas/testsuite/gas/aarch64/crypto-directive.d | 25 +------------ gas/testsuite/gas/aarch64/crypto-directive2.d | 4 +++ gas/testsuite/gas/aarch64/crypto-directive3.d | 4 +++ gas/testsuite/gas/aarch64/crypto.s | 8 +++++ .../gas/aarch64/illegal-crypto-nofp.l | 36 +++++++++---------- 7 files changed, 49 insertions(+), 45 deletions(-) create mode 100644 gas/testsuite/gas/aarch64/crypto-directive2.d create mode 100644 gas/testsuite/gas/aarch64/crypto-directive3.d diff --git a/gas/ChangeLog b/gas/ChangeLog index 992be9bbe3c..fb8efb2b3e1 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,15 @@ +2019-12-05 Jan Beulich + + * config/tc-aarch64.c (aarch64_features): Make SHA2 a prereq of + SHA3. + * testsuite/gas/aarch64/crypto.s + * testsuite/gas/aarch64/crypto-directive.d: Refer to crypto.d + for actual output. + * testsuite/gas/aarch64/illegal-crypto-nofp.l: Relax + expectations. + * testsuite/gas/aarch64/crypto-directive2.d, + testsuite/gas/aarch64/crypto-directive3.d: New. + 2019-12-04 Jan Beulich * config/tc-i386-intel.c (i386_intel_operand): Handle LFS et al diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index c2a6a1e75d0..5ac219c4b97 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -9038,9 +9038,8 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = { AARCH64_ARCH_NONE}, {"sm4", AARCH64_FEATURE (AARCH64_FEATURE_SM4, 0), AARCH64_ARCH_NONE}, - {"sha3", AARCH64_FEATURE (AARCH64_FEATURE_SHA2 - | AARCH64_FEATURE_SHA3, 0), - AARCH64_ARCH_NONE}, + {"sha3", AARCH64_FEATURE (AARCH64_FEATURE_SHA3, 0), + AARCH64_FEATURE (AARCH64_FEATURE_SHA2, 0)}, {"rng", AARCH64_FEATURE (AARCH64_FEATURE_RNG, 0), AARCH64_ARCH_NONE}, {"ssbs", AARCH64_FEATURE (AARCH64_FEATURE_SSBS, 0), diff --git a/gas/testsuite/gas/aarch64/crypto-directive.d b/gas/testsuite/gas/aarch64/crypto-directive.d index a2cde1fd2c0..6d4bcde7d09 100644 --- a/gas/testsuite/gas/aarch64/crypto-directive.d +++ b/gas/testsuite/gas/aarch64/crypto-directive.d @@ -1,27 +1,4 @@ #objdump: -dr #as: --defsym DIRECTIVE=1 #source: crypto.s - -.*: file format .* - -Disassembly of section \.text: - -0+ <.*>: - 0: 4e284be7 aese v7.16b, v31.16b - 4: 4e285be7 aesd v7.16b, v31.16b - 8: 4e286be7 aesmc v7.16b, v31.16b - c: 4e287be7 aesimc v7.16b, v31.16b - 10: 5e280be7 sha1h s7, s31 - 14: 5e281be7 sha1su1 v7.4s, v31.4s - 18: 5e282be7 sha256su0 v7.4s, v31.4s - 1c: 5e1f01e7 sha1c q7, s15, v31.4s - 20: 5e1f11e7 sha1p q7, s15, v31.4s - 24: 5e1f21e7 sha1m q7, s15, v31.4s - 28: 5e1f31e7 sha1su0 v7.4s, v15.4s, v31.4s - 2c: 5e1f41e7 sha256h q7, q15, v31.4s - 30: 5e1f51e7 sha256h2 q7, q15, v31.4s - 34: 5e1f61e7 sha256su1 v7.4s, v15.4s, v31.4s - 38: 0e3fe1e7 pmull v7.8h, v15.8b, v31.8b - 3c: 0effe1e7 pmull v7.1q, v15.1d, v31.1d - 40: 4e3fe1e7 pmull2 v7.8h, v15.16b, v31.16b - 44: 4effe1e7 pmull2 v7.1q, v15.2d, v31.2d +#dump: crypto.d diff --git a/gas/testsuite/gas/aarch64/crypto-directive2.d b/gas/testsuite/gas/aarch64/crypto-directive2.d new file mode 100644 index 00000000000..f93fdb1832b --- /dev/null +++ b/gas/testsuite/gas/aarch64/crypto-directive2.d @@ -0,0 +1,4 @@ +#objdump: -dr +#as: --defsym DIRECTIVE=2 +#source: crypto.s +#dump: crypto.d diff --git a/gas/testsuite/gas/aarch64/crypto-directive3.d b/gas/testsuite/gas/aarch64/crypto-directive3.d new file mode 100644 index 00000000000..d58714e8c10 --- /dev/null +++ b/gas/testsuite/gas/aarch64/crypto-directive3.d @@ -0,0 +1,4 @@ +#objdump: -dr +#as: --defsym DIRECTIVE=3 +#source: crypto.s +#dump: crypto.d diff --git a/gas/testsuite/gas/aarch64/crypto.s b/gas/testsuite/gas/aarch64/crypto.s index cb915dcf280..59eea74466a 100644 --- a/gas/testsuite/gas/aarch64/crypto.s +++ b/gas/testsuite/gas/aarch64/crypto.s @@ -21,8 +21,16 @@ .text .ifdef DIRECTIVE + .if DIRECTIVE > 1 + .arch_extension aes + .arch_extension sha2 + .else .arch_extension crypto .endif + .if DIRECTIVE == 3 + .arch_extension nosha3 + .endif + .endif aese v7.16b, v31.16b aesd v7.16b, v31.16b diff --git a/gas/testsuite/gas/aarch64/illegal-crypto-nofp.l b/gas/testsuite/gas/aarch64/illegal-crypto-nofp.l index a5649de669d..63ca09baaee 100644 --- a/gas/testsuite/gas/aarch64/illegal-crypto-nofp.l +++ b/gas/testsuite/gas/aarch64/illegal-crypto-nofp.l @@ -1,19 +1,19 @@ [^:]*: Assembler messages: -[^:]+:27: Error: selected processor does not support `aese v7\.16b,v31\.16b' -[^:]+:28: Error: selected processor does not support `aesd v7\.16b,v31\.16b' -[^:]+:29: Error: selected processor does not support `aesmc v7\.16b,v31\.16b' -[^:]+:30: Error: selected processor does not support `aesimc v7\.16b,v31\.16b' -[^:]+:32: Error: selected processor does not support `sha1h s7,s31' -[^:]+:33: Error: selected processor does not support `sha1su1 v7\.4s,v31\.4s' -[^:]+:34: Error: selected processor does not support `sha256su0 v7\.4s,v31\.4s' -[^:]+:36: Error: selected processor does not support `sha1c q7,s15,v31\.4s' -[^:]+:37: Error: selected processor does not support `sha1p q7,s15,v31\.4s' -[^:]+:38: Error: selected processor does not support `sha1m q7,s15,v31\.4s' -[^:]+:40: Error: selected processor does not support `sha1su0 v7\.4s,v15\.4s,v31\.4s' -[^:]+:41: Error: selected processor does not support `sha256h q7,q15,v31\.4s' -[^:]+:42: Error: selected processor does not support `sha256h2 q7,q15,v31\.4s' -[^:]+:43: Error: selected processor does not support `sha256su1 v7\.4s,v15\.4s,v31\.4s' -[^:]+:45: Error: selected processor does not support `pmull v7\.8h,v15\.8b,v31\.8b' -[^:]+:46: Error: selected processor does not support `pmull v7\.1q,v15\.1d,v31\.1d' -[^:]+:47: Error: selected processor does not support `pmull2 v7\.8h,v15\.16b,v31\.16b' -[^:]+:48: Error: selected processor does not support `pmull2 v7\.1q,v15\.2d,v31\.2d' +[^:]+:[0-9]+: Error: selected processor does not support `aese v7\.16b,v31\.16b' +[^:]+:[0-9]+: Error: selected processor does not support `aesd v7\.16b,v31\.16b' +[^:]+:[0-9]+: Error: selected processor does not support `aesmc v7\.16b,v31\.16b' +[^:]+:[0-9]+: Error: selected processor does not support `aesimc v7\.16b,v31\.16b' +[^:]+:[0-9]+: Error: selected processor does not support `sha1h s7,s31' +[^:]+:[0-9]+: Error: selected processor does not support `sha1su1 v7\.4s,v31\.4s' +[^:]+:[0-9]+: Error: selected processor does not support `sha256su0 v7\.4s,v31\.4s' +[^:]+:[0-9]+: Error: selected processor does not support `sha1c q7,s15,v31\.4s' +[^:]+:[0-9]+: Error: selected processor does not support `sha1p q7,s15,v31\.4s' +[^:]+:[0-9]+: Error: selected processor does not support `sha1m q7,s15,v31\.4s' +[^:]+:[0-9]+: Error: selected processor does not support `sha1su0 v7\.4s,v15\.4s,v31\.4s' +[^:]+:[0-9]+: Error: selected processor does not support `sha256h q7,q15,v31\.4s' +[^:]+:[0-9]+: Error: selected processor does not support `sha256h2 q7,q15,v31\.4s' +[^:]+:[0-9]+: Error: selected processor does not support `sha256su1 v7\.4s,v15\.4s,v31\.4s' +[^:]+:[0-9]+: Error: selected processor does not support `pmull v7\.8h,v15\.8b,v31\.8b' +[^:]+:[0-9]+: Error: selected processor does not support `pmull v7\.1q,v15\.1d,v31\.1d' +[^:]+:[0-9]+: Error: selected processor does not support `pmull2 v7\.8h,v15\.16b,v31\.16b' +[^:]+:[0-9]+: Error: selected processor does not support `pmull2 v7\.1q,v15\.2d,v31\.2d' -- 2.30.2