From d474e36b74b15de25bf18b0a10c6d460c0d3a39f Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 14 Oct 2018 16:32:49 +0100 Subject: [PATCH] add category descriptions --- simple_v_extension/opcodes.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/simple_v_extension/opcodes.mdwn b/simple_v_extension/opcodes.mdwn index a79e862d9..4ef2f3221 100644 --- a/simple_v_extension/opcodes.mdwn +++ b/simple_v_extension/opcodes.mdwn @@ -16,7 +16,7 @@ see [[specification]] for full details. indirected) twin-register operation (distinct source and destination) where either or both of source or destination may be redirected, vectorised, or **independently** predicated. This behaviour - covers the *entire* MV, VSPLAT, VINSERT, VREDUCE, VSCATTER, VGATHER + covers the *entire* VMV, VSPLAT, VINSERT, VREDUCE, VSCATTER, VGATHER paradigm. * **vld** - a standard contiguous (optionally twin-predicated, optionally indirected) multi-register load operation where either or both of -- 2.30.2