From d492196776068ee41b6566667c536d9f771a41e1 Mon Sep 17 00:00:00 2001
From: MANIKANDAN <MANIKANDAN@web>
Date: Mon, 27 Sep 2021 06:57:16 +0100
Subject: [PATCH]

---
 about_us.mdwn | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/about_us.mdwn b/about_us.mdwn
index b798f853b..c74ced180 100644
--- a/about_us.mdwn
+++ b/about_us.mdwn
@@ -215,3 +215,10 @@ Alain's website: <http://phcomp.co.uk>
 * Experience: FPGA/ASIC system validation, instrument automation using VISA, PCB design (KiCAD, Altium)
 * Other interests: Lingua Latina, Philosophy, History
 * Availability: Full-time
+
+## [[Manikandan Nagarajan|Manik]]
+
+* Languages: Verilog HDL, C, Python & TCL
+* Experience : Domain Specific Architecture Design and Implementation, IP Core Development, System on Chip, FPGA System Design, Chip Tapeout, Crypto Chip Design, Authentication Protocol Design. 
+* LinkedIn Profile: [[https://www.linkedin.com/in/manikandan-nagarajan-2156171a0/]]
+* Availability: 8~10hrs/week
-- 
2.30.2