From d4e29af2344c06490913efc35430f93a966061bb Mon Sep 17 00:00:00 2001 From: =?utf8?q?Alejandro=20Pi=C3=B1eiro?= Date: Fri, 11 Sep 2015 12:21:13 +0200 Subject: [PATCH] i965/vec4: check writemask when bailing out at register coalesce opt_register_coalesce stopped to check previous instructions to coalesce with if somebody else was writing on the same destination. This can be optimized to check if somebody else was writing to the same channels of the same destination using the writemask. Shader DB results (taking into account only vec4): total instructions in shared programs: 1781593 -> 1734957 (-2.62%) instructions in affected programs: 1238390 -> 1191754 (-3.77%) helped: 12782 HURT: 0 GAINED: 0 LOST: 0 v2: removed some parenthesis, fixed indentation, as suggested by Matt Turner v3: added brackets, for consistency, as suggested by Eduardo Lima Reviewed-by: Matt Turner --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 893ff356afa..c4da1a11be8 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -1090,11 +1090,13 @@ vec4_visitor::opt_register_coalesce() if (interfered) break; - /* If somebody else writes our destination here, we can't coalesce - * before that. + /* If somebody else writes the same channels of our destination here, + * we can't coalesce before that. */ - if (inst->dst.in_range(scan_inst->dst, scan_inst->regs_written)) - break; + if (inst->dst.in_range(scan_inst->dst, scan_inst->regs_written) && + (inst->dst.writemask & scan_inst->dst.writemask) != 0) { + break; + } /* Check for reads of the register we're trying to coalesce into. We * can't go rewriting instructions above that to put some other value -- 2.30.2