From d4eb01c22d7475b0d577408089965cf658cbf6a5 Mon Sep 17 00:00:00 2001 From: Shriya Sharma Date: Fri, 27 Oct 2023 11:24:39 +0100 Subject: [PATCH] added english language description for lhzsx instruction --- openpower/isa/fixedloadshift.mdwn | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn index 7a4fe660..dfef1d51 100644 --- a/openpower/isa/fixedloadshift.mdwn +++ b/openpower/isa/fixedloadshift.mdwn @@ -91,6 +91,16 @@ Pseudo-code: EA <- b + (RB) << (SH+1) RT <- ([0] * (XLEN-16)) || MEM(EA, 2) +Description: + + Let the effective address (EA) be the sum of the contents of + register RB shifted by (SH+1), and (RA|0). + + The halfword in storage addressed by EA is loaded into + RT[48:63]. RT[0:47] are set to 0. + + + Special Registers Altered: None -- 2.30.2