From d55c543c3637fec784518f34b1f12e7a73be2281 Mon Sep 17 00:00:00 2001
From: Matt Turner <mattst88@gmail.com>
Date: Tue, 23 Apr 2013 17:19:06 -0700
Subject: [PATCH] glsl: Add support for new fma built-in in ARB_gpu_shader5.

v2: Add constant folding support.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
---
 src/glsl/ir.cpp                            |  1 +
 src/glsl/ir.h                              |  7 +++++++
 src/glsl/ir_constant_expression.cpp        | 11 +++++++++++
 src/glsl/ir_validate.cpp                   |  1 +
 src/mesa/program/ir_to_mesa.cpp            |  1 +
 src/mesa/state_tracker/st_glsl_to_tgsi.cpp |  1 +
 6 files changed, 22 insertions(+)

diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp
index 99dceacf85f..c6d96d8da03 100644
--- a/src/glsl/ir.cpp
+++ b/src/glsl/ir.cpp
@@ -515,6 +515,7 @@ static const char *const operator_strs[] = {
    "bfm",
    "ubo_load",
    "vector_extract",
+   "fma",
    "lrp",
    "bfi",
    "bitfield_extract",
diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index 62e3b27ca92..b45e6cbd831 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -1169,6 +1169,13 @@ enum ir_expression_operation {
     */
    ir_last_binop = ir_binop_vector_extract,
 
+   /**
+    * \name Fused floating-point multiply-add, part of ARB_gpu_shader5.
+    */
+   /*@{*/
+   ir_triop_fma,
+   /*@}*/
+
    ir_triop_lrp,
 
    /**
diff --git a/src/glsl/ir_constant_expression.cpp b/src/glsl/ir_constant_expression.cpp
index 0a725b45bc4..bf019b95577 100644
--- a/src/glsl/ir_constant_expression.cpp
+++ b/src/glsl/ir_constant_expression.cpp
@@ -1375,6 +1375,17 @@ ir_expression::constant_expression_value(struct hash_table *variable_context)
       break;
    }
 
+   case ir_triop_fma:
+      assert(op[0]->type->base_type == GLSL_TYPE_FLOAT);
+      assert(op[1]->type->base_type == GLSL_TYPE_FLOAT);
+      assert(op[2]->type->base_type == GLSL_TYPE_FLOAT);
+
+      for (unsigned c = 0; c < components; c++) {
+         data.f[c] = op[0]->value.f[c] * op[1]->value.f[c]
+                                       + op[2]->value.f[c];
+      }
+      break;
+
    case ir_triop_lrp: {
       assert(op[0]->type->base_type == GLSL_TYPE_FLOAT);
       assert(op[1]->type->base_type == GLSL_TYPE_FLOAT);
diff --git a/src/glsl/ir_validate.cpp b/src/glsl/ir_validate.cpp
index ce96f6855a7..37f26febe55 100644
--- a/src/glsl/ir_validate.cpp
+++ b/src/glsl/ir_validate.cpp
@@ -522,6 +522,7 @@ ir_validate::visit_leave(ir_expression *ir)
              && ir->operands[1]->type->is_integer());
       break;
 
+   case ir_triop_fma:
    case ir_triop_lrp:
       assert(ir->operands[0]->type->base_type == GLSL_TYPE_FLOAT);
       assert(ir->operands[0]->type == ir->operands[1]->type);
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index f612f41baff..340a4497fdd 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -1492,6 +1492,7 @@ ir_to_mesa_visitor::visit(ir_expression *ir)
 
    case ir_binop_vector_extract:
    case ir_binop_bfm:
+   case ir_triop_fma:
    case ir_triop_bfi:
    case ir_triop_bitfield_extract:
    case ir_triop_vector_insert:
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 4e29e4500e9..37779d4e5e4 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -1972,6 +1972,7 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir)
    case ir_unop_find_msb:
    case ir_unop_find_lsb:
    case ir_binop_bfm:
+   case ir_triop_fma:
    case ir_triop_bfi:
    case ir_triop_bitfield_extract:
    case ir_quadop_bitfield_insert:
-- 
2.30.2