From d589af61a33f96e5bce6409e418e6d4400081ebe Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 8 Jun 2023 04:36:38 +0100 Subject: [PATCH] --- openpower/sv/po9_encoding/discussion.mdwn | 30 ++++++++++++++++++++--- 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/openpower/sv/po9_encoding/discussion.mdwn b/openpower/sv/po9_encoding/discussion.mdwn index 4542504a6..38ca9c2c7 100644 --- a/openpower/sv/po9_encoding/discussion.mdwn +++ b/openpower/sv/po9_encoding/discussion.mdwn @@ -1,4 +1,4 @@ -# alternative 32-64 encoding +# alternative 32-64 encoding (1) ``` |0-5| 6-27 28 29|30-31|32|33-35|36-37| 38-59 | 60-63 | Description | @@ -6,18 +6,19 @@ |PO9| rm0 | 0 0 | 0 0 | 0 000 rm1 | xxxx | 0000 | SVP64:EXT900 | |PO9| rm0 | 0 0 | 0 0 | 1 000 rm1 | xxxx | 0000 | SSingle:EXT900 | |PO9| xxx | x 0 | 0 0 | x !zero | xxxx | !zero | 55-bit RESERVED | -|PO9| xxx | x 0 | 0 0 | 32-bit EXT900 (Vectorizable) | +|PO9| xxx | 0 1 | 0 0 | 32-bit EXT900 (Vectorizable) | |PO9| xxx | 1 1 | 0 0 | 32-bit EXT901 (Unvectorizable) | |PO9| !ZERO | 0 0 | 1 | DWi | SSingle:EXT232-263 | |PO9| 0000 | 0 0 | 1 | DWi | Scalar EXT232-263 | -|PO9| nnnn | 1 0 | 1 | DWi | SVP64:EXT232-263 | +|PO9| RM | 1 0 | 1 | DWi | SVP64:EXT232-263 | |PO9| 0000 | 0 1 | Defined Word-instruction | 32-bit Unvec in 64b| |PO9| !ZERO | 0 1 | Defined Word-instruction | SSingle:EXT000-063 | -|PO9| nnnn | 1 1 | Defined Word-instruction | SVP64:EXT000-063 | +|PO9| RM | 1 1 | Defined Word-instruction | SVP64:EXT000-063 | ``` Fields: +* RM 24-bit SVP64 prefix * SVP64 `RM <- rm0 || rm1` Length detection: @@ -42,3 +43,24 @@ Instruction allocation restrictions: two 32-bit instructions. * but those types of space-saving instructions **also need to be Vectorizable* + +# alternative 32-64 encoding (2) + +the complexity of attempting to fit + + +``` +|0-5| 6-27 28 29|30-31|32|33-35|36-37| 38-59 | 60-63 | Description | +|---|-----|-----|-----|--|-----|-----|-------|-------|------------------| +|PO9| rm0 | 0 0 | 0 0 | 0 000 rm1 | xxxx | 0000 | SVP64:EXT900 | +|PO9| rm0 | 0 0 | 0 0 | 1 000 rm1 | xxxx | 0000 | SSingle:EXT900 | +|PO9| xxx | x 0 | 0 0 | x !zero | xxxx | !zero | 55-bit RESERVED | +|PO9| xxx | x 0 | 0 0 | 32-bit EXT900 (Vectorizable) | +|PO9| xxx | 1 1 | 0 0 | 32-bit EXT901 (Unvectorizable) | +|PO9| !ZERO | 0 0 | 1 | DWi | SSingle:EXT232-263 | +|PO9| 0000 | 0 0 | 1 | DWi | Scalar EXT232-263 | +|PO9| nnnn | 1 0 | 1 | DWi | SVP64:EXT232-263 | +|PO9| 0000 | 0 1 | Defined Word-instruction | 32-bit Unvec in 64b| +|PO9| !ZERO | 0 1 | Defined Word-instruction | SSingle:EXT000-063 | +|PO9| nnnn | 1 1 | Defined Word-instruction | SVP64:EXT000-063 | +``` -- 2.30.2