From d5e4ff48146169795c31246ac5547df56bd799a8 Mon Sep 17 00:00:00 2001 From: Michael Hayes Date: Tue, 13 Oct 1998 03:04:59 +0000 Subject: [PATCH] c4x.c: Convert to gen_rtx_FOO. * config/c4x/c4x.c: Convert to gen_rtx_FOO. Added ATTRIBUTE_UNUSED to unused function arguments. (rc_reg_operand): New predicate. (c4x_rptb_insert): New function. (c4x_rptb_nop_p): Recognize modified rptb_top pattern. (c4x_optimization_options): New function. * config/c4x/c4x.md: Convert to gen_rtx_FOO. (decrement_and_branch_on_count): New pattern. (rptb_top): Modified pattern to work with BCT optimization. * config/c4x/c4x.h (RC_REG): New register class. (rc_reg_operand): Define prototype. (IS_RC_REG): New macro. (IS_RC_OR_PSEUDO_REG): New macro. (IS_RC_OR_PSEUDO_REGNO): New macro. (OPTIMIZATION_OPTIONS): Define. From-SVN: r23037 --- gcc/ChangeLog | 20 ++++ gcc/config/c4x/c4x.c | 254 +++++++++++++++++++++++++----------------- gcc/config/c4x/c4x.h | 32 ++++-- gcc/config/c4x/c4x.md | 98 ++++++++++------ gcc/config/c4x/t-c4x | 3 - 5 files changed, 261 insertions(+), 146 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 75f149b29c0..26df069c775 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,23 @@ +Tue Oct 13 21:38:35 1998 Michael Hayes + + * config/c4x/c4x.c: Convert to gen_rtx_FOO. + Added ATTRIBUTE_UNUSED to unused function arguments. + (rc_reg_operand): New predicate. + (c4x_rptb_insert): New function. + (c4x_rptb_nop_p): Recognize modified rptb_top pattern. + (c4x_optimization_options): New function. + + * config/c4x/c4x.md: Convert to gen_rtx_FOO. + (decrement_and_branch_on_count): New pattern. + (rptb_top): Modified pattern to work with BCT optimization. + + * config/c4x/c4x.h (RC_REG): New register class. + (rc_reg_operand): Define prototype. + (IS_RC_REG): New macro. + (IS_RC_OR_PSEUDO_REG): New macro. + (IS_RC_OR_PSEUDO_REGNO): New macro. + (OPTIMIZATION_OPTIONS): Define. + Mon Oct 12 19:57:34 1998 Jason Merrill * collect2.c (extract_init_priority): No priority is 65535. diff --git a/gcc/config/c4x/c4x.c b/gcc/config/c4x/c4x.c index f6b75c13ec4..b471e3758d2 100644 --- a/gcc/config/c4x/c4x.c +++ b/gcc/config/c4x/c4x.c @@ -87,7 +87,7 @@ enum reg_class c4x_regclass_map[FIRST_PSEUDO_REGISTER] = NO_REGS, /* IIF/IOF No */ INT_REGS, /* RS QI No */ INT_REGS, /* RE QI No */ - INT_REGS, /* RC QI No */ + RC_REG, /* RC QI No */ EXT_REGS, /* R8 QI, QF, HF QI */ EXT_REGS, /* R9 QI, QF, HF No */ EXT_REGS, /* R10 QI, QF, HF No */ @@ -246,6 +246,15 @@ c4x_override_options () } +void +c4x_optimization_options (level, size) + int level; + int size ATTRIBUTE_UNUSED; +{ + /* When optimizing, enable use of RPTB instruction. */ + if (level >= 1) + flag_branch_on_count_reg = 1; +} /* Write an ASCII string. */ @@ -591,7 +600,7 @@ c4x_function_arg (cum, mode, type, named) fprintf (stderr, ")\n"); } if (reg) - return gen_rtx (REG, mode, reg); + return gen_rtx_REG (mode, reg); else return NULL_RTX; } @@ -1042,7 +1051,7 @@ c4x_null_epilogue_p () void c4x_emit_libcall (name, code, dmode, smode, noperands, operands) - const char *name; + char *name; enum rtx_code code; enum machine_mode dmode; enum machine_mode smode; @@ -1055,7 +1064,7 @@ c4x_emit_libcall (name, code, dmode, smode, noperands, operands) rtx equiv; start_sequence (); - libcall = gen_rtx (SYMBOL_REF, Pmode, name); + libcall = gen_rtx_SYMBOL_REF (Pmode, name); switch (noperands) { case 2: @@ -1092,7 +1101,7 @@ c4x_emit_libcall3 (name, code, mode, operands) void c4x_emit_libcall_mulhi (name, code, mode, operands) - const char *name; + char *name; enum rtx_code code; enum machine_mode mode; rtx *operands; @@ -1103,15 +1112,15 @@ c4x_emit_libcall_mulhi (name, code, mode, operands) rtx equiv; start_sequence (); - libcall = gen_rtx (SYMBOL_REF, Pmode, name); + libcall = gen_rtx_SYMBOL_REF (Pmode, name); ret = emit_library_call_value (libcall, NULL_RTX, 1, mode, 2, operands[1], mode, operands[2], mode); - equiv = gen_rtx (TRUNCATE, mode, - gen_rtx (LSHIFTRT, HImode, - gen_rtx (MULT, HImode, + equiv = gen_rtx_TRUNCATE (mode, + gen_rtx_LSHIFTRT (HImode, + gen_rtx_MULT (HImode, gen_rtx (code, HImode, operands[1]), gen_rtx (code, HImode, operands[2])), - gen_rtx (CONST_INT, VOIDmode, 32))); + gen_rtx_CONST_INT (VOIDmode, 32))); insns = get_insns (); end_sequence (); emit_libcall_block (insns, operands[0], ret, equiv); @@ -1144,7 +1153,7 @@ c4x_preferred_reload_class (x, class) enum reg_class c4x_limit_reload_class (mode, class) - enum machine_mode mode; + enum machine_mode mode ATTRIBUTE_UNUSED; enum reg_class class; { return class; @@ -1153,9 +1162,9 @@ c4x_limit_reload_class (mode, class) enum reg_class c4x_secondary_memory_needed (class1, class2, mode) - enum reg_class class1; - enum reg_class class2; - enum machine_mode mode; + enum reg_class class1 ATTRIBUTE_UNUSED; + enum reg_class class2 ATTRIBUTE_UNUSED; + enum machine_mode mode ATTRIBUTE_UNUSED; { return 0; } @@ -1349,8 +1358,8 @@ c4x_check_legit_addr (mode, addr, strict) rtx c4x_legitimize_address (orig, mode) - rtx orig; - enum machine_mode mode; + rtx orig ATTRIBUTE_UNUSED; + enum machine_mode mode ATTRIBUTE_UNUSED; { return NULL_RTX; } @@ -1443,9 +1452,9 @@ c4x_gen_compare_reg (code, x, y) && (code == LE || code == GE || code == LT || code == GT)) return NULL_RTX; - cc_reg = gen_rtx (REG, mode, ST_REGNO); - emit_insn (gen_rtx (SET, VOIDmode, cc_reg, - gen_rtx (COMPARE, mode, x, y))); + cc_reg = gen_rtx_REG (mode, ST_REGNO); + emit_insn (gen_rtx_SET (VOIDmode, cc_reg, + gen_rtx_COMPARE (mode, x, y))); return cc_reg; } @@ -1901,9 +1910,9 @@ c4x_scan_for_ldp (newop, insn, operand0) addr = XEXP (addr, 0); if (GET_CODE (addr) == CONST_INT) { - op1 = gen_rtx (CONST_INT, VOIDmode, INTVAL (addr) & ~0xffff); + op1 = gen_rtx_CONST_INT (VOIDmode, INTVAL (addr) & ~0xffff); emit_insn_before (gen_movqi (operand0, op1), insn); - op1 = gen_rtx (CONST_INT, VOIDmode, INTVAL (addr) & 0xffff); + op1 = gen_rtx_CONST_INT (VOIDmode, INTVAL (addr) & 0xffff); emit_insn_before (gen_iorqi3_noclobber (operand0, operand0, op1), insn); delete_insn (insn); @@ -1932,13 +1941,14 @@ c4x_scan_for_ldp (newop, insn, operand0) } } if (!TARGET_SMALL) - emit_insn_before (gen_set_ldp (gen_rtx (REG, Pmode, DP_REGNO), + emit_insn_before (gen_set_ldp (gen_rtx_REG (Pmode, DP_REGNO), operand), insn); /* Replace old memory reference with direct reference. */ - *newop = gen_rtx (MEM, GET_MODE (operand), - gen_rtx (PLUS, Pmode, - gen_rtx (REG, Pmode, DP_REGNO), op0)); + *newop = gen_rtx_MEM (GET_MODE (operand), + gen_rtx_PLUS (Pmode, + gen_rtx_REG (Pmode, DP_REGNO), + op0)); /* Use change_address? */ MEM_VOLATILE_P (*newop) = MEM_VOLATILE_P (operand); @@ -1977,15 +1987,15 @@ c4x_scan_for_ldp (newop, insn, operand0) break; op0 = XEXP (force_const_mem (Pmode, operand), 0); - *newop = gen_rtx (MEM, GET_MODE (operand), - gen_rtx (PLUS, Pmode, - gen_rtx (PLUS, Pmode, - gen_rtx (USE, VOIDmode, operand), - gen_rtx (REG, Pmode, DP_REGNO)), - op0)); - + *newop = gen_rtx_MEM (GET_MODE (operand), + gen_rtx_PLUS (Pmode, + gen_rtx_PLUS (Pmode, + gen_rtx_USE (VOIDmode, operand), + gen_rtx_REG (Pmode, DP_REGNO)), + op0)); + if (!TARGET_SMALL) - emit_insn_before (gen_set_ldp_use (gen_rtx (REG, Pmode, DP_REGNO), + emit_insn_before (gen_set_ldp_use (gen_rtx_REG (Pmode, DP_REGNO), *newop, operand), insn); return 0; @@ -2021,14 +2031,20 @@ c4x_scan_for_ldp (newop, insn, operand0) Note that we cannot have a call insn, since we don't generate repeat loops with calls in them (although I suppose we could, but - there's no benefit.) */ + there's no benefit.) + + !!! FIXME. The rptb_top insn may be sucked into a SEQUENCE. */ int c4x_rptb_nop_p (insn) rtx insn; { + rtx start_label; int i; + /* Extract the start label from the jump pattern (rptb_end). */ + start_label = XEXP (XEXP (SET_SRC (XVECEXP (PATTERN (insn), 0, 0)), 1), 0); + /* If there is a label at the end of the loop we must insert a NOP. */ insn = prev_nonnote_insn (insn); @@ -2040,21 +2056,48 @@ c4x_rptb_nop_p (insn) /* Search back for prev non-note and non-label insn. */ while (GET_CODE (insn) == NOTE || GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == USE || GET_CODE (insn) == CLOBBER) - insn = PREV_INSN (insn); + { + if (insn == start_label) + return i == 0; + + insn = PREV_INSN (insn); + }; - /* I we have a jump instruction we should insert a NOP. If we + /* If we have a jump instruction we should insert a NOP. If we hit repeat block top we should only insert a NOP if the loop is empty. */ if (GET_CODE (insn) == JUMP_INSN) return 1; - else if (recog_memoized (insn) == CODE_FOR_rptb_top) - return i == 0; insn = PREV_INSN (insn); } return 0; } +void +c4x_rptb_insert (insn) + rtx insn; +{ + rtx end_label; + rtx start_label; + + /* Extract the start label from the jump pattern (rptb_end). */ + start_label = XEXP (XEXP (SET_SRC (XVECEXP (PATTERN (insn), 0, 0)), 1), 0); + + /* We'll have to update the basic blocks. */ + end_label = gen_label_rtx (); + emit_label_after (end_label, insn); + + for (; insn; insn = PREV_INSN (insn)) + if (insn == start_label) + break; + if (!insn) + fatal_insn ("c4x_rptb_insert: Cannot find start label", start_label); + + /* We'll have to update the basic blocks. */ + emit_insn_before (gen_rptb_top (start_label, end_label), insn); +} + /* This function is a C4x special. It scans through all the insn operands looking for places where the DP register needs to be reloaded and for large immediate operands that need to be converted @@ -2067,7 +2110,6 @@ void c4x_process_after_reload (first) rtx first; { - rtx operand0; rtx insn; int i; @@ -2076,7 +2118,6 @@ c4x_process_after_reload (first) /* Look for insn. */ if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') { - int noperands; int insn_code_number; insn_code_number = recog_memoized (insn); @@ -2084,6 +2125,11 @@ c4x_process_after_reload (first) if (insn_code_number < 0) continue; + /* Insert the RTX for RPTB at the top of the loop + and a label at the end of the loop. */ + if (insn_code_number == CODE_FOR_rptb_end) + c4x_rptb_insert(insn); + /* We split all insns here if they have a # for the output template if we are using the big memory model since there is a chance that we might be accessing memory across a @@ -2109,7 +2155,7 @@ c4x_process_after_reload (first) /* Do we have to update the basic block info here? Maybe reorg wants it sorted out... */ - /* Continue with the first of the new insns gnerated + /* Continue with the first of the new insns generated by the split. */ insn = new; @@ -2121,20 +2167,13 @@ c4x_process_after_reload (first) } /* Ignore jumps and calls. */ - if (GET_CODE (insn) == CALL_INSN - || GET_CODE (insn) == JUMP_INSN) - { - continue; /* Hopefully we are not hosed here. */ - } - - noperands = insn_n_operands[insn_code_number]; + if (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN) + continue; insn_extract (insn); - - operand0 = recog_operand[0]; - - for (i = 0; i < noperands; i++) - if (c4x_scan_for_ldp (recog_operand_loc[i], insn, operand0)) + for (i = 0; i < insn_n_operands[insn_code_number]; i++) + if (c4x_scan_for_ldp (recog_operand_loc[i], insn, + recog_operand[0])) break; } } @@ -2555,7 +2594,7 @@ c4x_T_constraint (op) int c4x_autoinc_operand (op, mode) rtx op; - enum machine_mode mode; + enum machine_mode mode ATTRIBUTE_UNUSED; { if (GET_CODE (op) == MEM) { @@ -2578,8 +2617,8 @@ c4x_autoinc_operand (op, mode) int any_operand (op, mode) - register rtx op; - enum machine_mode mode; + register rtx op ATTRIBUTE_UNUSED; + enum machine_mode mode ATTRIBUTE_UNUSED; { return 1; } @@ -2637,7 +2676,7 @@ const_operand (op, mode) int stik_const_operand (op, mode) rtx op; - enum machine_mode mode; + enum machine_mode mode ATTRIBUTE_UNUSED; { return c4x_K_constant (op); } @@ -2646,7 +2685,7 @@ stik_const_operand (op, mode) int not_const_operand (op, mode) rtx op; - enum machine_mode mode; + enum machine_mode mode ATTRIBUTE_UNUSED; { return c4x_N_constant (op); } @@ -2663,7 +2702,7 @@ reg_operand (op, mode) int reg_imm_operand (op, mode) rtx op; - enum machine_mode mode; + enum machine_mode mode ATTRIBUTE_UNUSED; { if (REG_P (op) || CONSTANT_P (op)) return 1; @@ -2673,7 +2712,7 @@ reg_imm_operand (op, mode) int not_modify_reg (op, mode) rtx op; - enum machine_mode mode; + enum machine_mode mode ATTRIBUTE_UNUSED; { if (REG_P (op) || CONSTANT_P (op)) return 1; @@ -2709,7 +2748,7 @@ not_modify_reg (op, mode) int not_rc_reg (op, mode) rtx op; - enum machine_mode mode; + enum machine_mode mode ATTRIBUTE_UNUSED; { if (REG_P (op) && REGNO (op) == RC_REGNO) return 0; @@ -2826,7 +2865,7 @@ index_reg_operand (op, mode) int dp_reg_operand (op, mode) rtx op; - enum machine_mode mode; + enum machine_mode mode ATTRIBUTE_UNUSED; { return REG_P (op) && IS_DP_OR_PSEUDO_REGNO (op); } @@ -2837,7 +2876,7 @@ dp_reg_operand (op, mode) int sp_reg_operand (op, mode) rtx op; - enum machine_mode mode; + enum machine_mode mode ATTRIBUTE_UNUSED; { return REG_P (op) && IS_SP_OR_PSEUDO_REGNO (op); } @@ -2848,16 +2887,27 @@ sp_reg_operand (op, mode) int st_reg_operand (op, mode) register rtx op; - enum machine_mode mode; + enum machine_mode mode ATTRIBUTE_UNUSED; { return REG_P (op) && IS_ST_OR_PSEUDO_REGNO (op); } +/* RC register. */ + +int +rc_reg_operand (op, mode) + register rtx op; + enum machine_mode mode ATTRIBUTE_UNUSED; +{ + return REG_P (op) && IS_RC_OR_PSEUDO_REGNO (op); +} + + int call_operand (op, mode) rtx op; - enum machine_mode mode; + enum machine_mode mode ATTRIBUTE_UNUSED; { if (GET_CODE (op) != MEM) return 0; @@ -3197,7 +3247,7 @@ c4x_label_conflict (insn, jump, db) int valid_parallel_operands_4 (operands, mode) rtx *operands; - enum machine_mode mode; + enum machine_mode mode ATTRIBUTE_UNUSED; { rtx op0 = operands[0]; rtx op1 = operands[1]; @@ -3246,7 +3296,7 @@ valid_parallel_operands_4 (operands, mode) int valid_parallel_operands_5 (operands, mode) rtx *operands; - enum machine_mode mode; + enum machine_mode mode ATTRIBUTE_UNUSED; { int regs = 0; rtx op0 = operands[1]; @@ -3272,7 +3322,7 @@ valid_parallel_operands_5 (operands, mode) int valid_parallel_operands_6 (operands, mode) rtx *operands; - enum machine_mode mode; + enum machine_mode mode ATTRIBUTE_UNUSED; { int regs = 0; rtx op0 = operands[1]; @@ -3544,7 +3594,7 @@ legitimize_operands (code, operands, mode) a positive count, so we emit a NEG. */ if ((code == ASHIFTRT || code == LSHIFTRT) && (GET_CODE (operands[2]) != CONST_INT)) - operands[2] = gen_rtx (NEG, mode, negate_rtx (mode, operands[2])); + operands[2] = gen_rtx_NEG (mode, negate_rtx (mode, operands[2])); return 1; } @@ -3882,7 +3932,7 @@ c4x_operand_subword (op, i, validate_address, mode) mode = QImode; else if (mode == HFmode) mode = QFmode; - return gen_rtx (MEM, mode, XEXP (op, 0)); + return gen_rtx_MEM (mode, XEXP (op, 0)); case POST_DEC: case PRE_DEC: @@ -3921,7 +3971,7 @@ c4x_operand_subword (op, i, validate_address, mode) int c4x_handle_pragma (p_getc, p_ungetc, pname) int (* p_getc) PROTO ((void)); - void (* p_ungetc) PROTO ((int)); + void (* p_ungetc) PROTO ((int)) ATTRIBUTE_UNUSED; char *pname; { int i; @@ -3987,7 +4037,6 @@ c4x_handle_pragma (p_getc, p_ungetc, pname) } name[i] = 0; sect = build_string (i, name); - TREE_TYPE (sect) = char_array_type_node; free (name); sect = build_tree_list (NULL_TREE, sect); @@ -4083,9 +4132,9 @@ c4x_set_default_attributes(decl, attributes) int c4x_valid_type_attribute_p (type, attributes, identifier, args) tree type; - tree attributes; + tree attributes ATTRIBUTE_UNUSED; tree identifier; - tree args; + tree args ATTRIBUTE_UNUSED; { if (TREE_CODE (type) != FUNCTION_TYPE) return 0; @@ -4295,7 +4344,7 @@ c4x_parallel_pack (insn1, insn2, depend) return 0; } - pack = gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2, set1, set2)); + pack = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set1, set2)); num_clobbers = 0; if ((insn_code_number = recog (pack, pack, &num_clobbers)) < 0) return 0; @@ -4305,8 +4354,8 @@ c4x_parallel_pack (insn1, insn2, depend) rtx newpack; int i; - newpack = gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (GET_CODE (pack) == PARALLEL + newpack = gen_rtx_PARALLEL (VOIDmode, + gen_rtvec (GET_CODE (pack) == PARALLEL ? XVECLEN (pack, 0) + num_clobbers : num_clobbers + 1)); @@ -4471,10 +4520,10 @@ c4x_copy_insn_after(insn, prev, bb) /* Copy the REG_NOTES from insn to the new insn. */ for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) - REG_NOTES (new) = gen_rtx (GET_CODE (note), - REG_NOTE_KIND (note), - XEXP (note, 0), - REG_NOTES (new)); + REG_NOTES (new) = gen_rtx (GET_CODE (note), + REG_NOTE_KIND (note), + XEXP (note, 0), + REG_NOTES (new)); /* Handle all the registers within insn and update the reg info. */ c4x_update_info_regs (PATTERN (insn), bb); @@ -4529,7 +4578,7 @@ c4x_merge_notes(insn, insn2) remove_note (insn, note); } for (note = REG_NOTES (insn2); note; note = XEXP (note, 1)) - REG_NOTES (insn) = gen_rtx (GET_CODE (note), + REG_NOTES (insn) = gen_rtx (GET_CODE (note), REG_NOTE_KIND (note), XEXP (note, 0), REG_NOTES (insn)); @@ -4736,25 +4785,25 @@ c4x_parallel_process (loop_start, loop_end) { /* The loop count must be more than 1 surely? */ SET_SRC (loop_count_set) - = gen_rtx (CONST_INT, VOIDmode, - INTVAL (SET_SRC (loop_count_set)) -1); + = gen_rtx_CONST_INT (VOIDmode, + INTVAL (SET_SRC (loop_count_set)) -1); } else if (GET_CODE (SET_SRC (loop_count_set)) == PLUS && GET_CODE (XEXP (SET_SRC (loop_count_set), 1)) == CONST_INT) { XEXP (SET_SRC (loop_count_set), 1) - = gen_rtx (CONST_INT, VOIDmode, - INTVAL (XEXP (SET_SRC (loop_count_set), 1)) - - 1); + = gen_rtx_CONST_INT (VOIDmode, + INTVAL (XEXP (SET_SRC (loop_count_set), 1)) + - 1); } else { start_sequence (); expand_binop (QImode, sub_optab, - gen_rtx (REG, QImode, RC_REGNO), - gen_rtx (CONST_INT, VOIDmode, 1), - gen_rtx (REG, QImode, RC_REGNO), + gen_rtx_REG (QImode, RC_REGNO), + gen_rtx_CONST_INT (VOIDmode, 1), + gen_rtx_REG (QImode, RC_REGNO), 1, OPTAB_DIRECT); seq_start = get_insns (); end_sequence (); @@ -4763,13 +4812,13 @@ c4x_parallel_process (loop_start, loop_end) /* Check this. What if we emit more than one insn? Can we emit more than one insn? */ REG_NOTES (seq_start) - = gen_rtx (EXPR_LIST, REG_UNUSED, - gen_rtx (REG, QImode, RC_REGNO), + = gen_rtx_EXPR_LIST (REG_UNUSED, + gen_rtx_REG (QImode, RC_REGNO), REG_NOTES (seq_start)); } start_sequence (); - emit_cmp_insn (gen_rtx (REG, QImode, RC_REGNO), + emit_cmp_insn (gen_rtx_REG (QImode, RC_REGNO), const0_rtx, LT, NULL_RTX, QImode, 0, 0); emit_jump_insn (gen_blt (end_label)); seq_start = get_insns (); @@ -4778,8 +4827,8 @@ c4x_parallel_process (loop_start, loop_end) /* This is a bit of a hack... */ REG_NOTES (NEXT_INSN (seq_start)) - = gen_rtx (EXPR_LIST, REG_DEAD, - gen_rtx (REG, QImode, RC_REGNO), + = gen_rtx_EXPR_LIST (REG_DEAD, + gen_rtx_REG (QImode, RC_REGNO), REG_NOTES (NEXT_INSN (seq_start))); if (TARGET_DEVEL) @@ -4804,7 +4853,7 @@ c4x_parallel_process (loop_start, loop_end) static void c4x_combine_parallel_independent (insns) - rtx insns; + rtx insns ATTRIBUTE_UNUSED; { /* Combine independent insns like (set (mem (reg 0)) (reg 1)) @@ -5182,7 +5231,7 @@ c4x_rptb_loop_info_get (loop_start, loop_end, loop_info) } loop_info->off_by_one = (cc == LT || cc == LTU || cc == GT || cc == GTU); - loop_info->unsigned_p |= (cc == LTU || cc == LEU || cc == GTU || cc == GEU); + /* We have a switch to allow an unsigned loop counter. We'll normally disallow this case since the the repeat @@ -5209,7 +5258,7 @@ c4x_rptb_emit_init (loop_info) /* If have a known constant loop count, things are easy... */ if (loop_info->loop_count > 0) - return gen_rtx (CONST_INT, VOIDmode, loop_info->loop_count - 1); + return gen_rtx_CONST_INT (VOIDmode, loop_info->loop_count - 1); if (loop_info->shift < 0) abort (); @@ -5239,14 +5288,14 @@ c4x_rptb_emit_init (loop_info) /* (end_value - start_value + adjust) >> shift */ result = expand_binop (QImode, loop_info->unsigned_p ? lshr_optab : ashr_optab, result, - gen_rtx (CONST_INT, VOIDmode, + gen_rtx_CONST_INT (VOIDmode, loop_info->shift), 0, loop_info->unsigned_p, OPTAB_DIRECT); } /* ((end_value - start_value + adjust) >> shift) - 1 */ result = expand_binop (QImode, sub_optab, - result, gen_rtx (CONST_INT, VOIDmode, 1), + result, gen_rtx_CONST_INT (VOIDmode, 1), 0, loop_info->unsigned_p, OPTAB_DIRECT); seq_start = get_insns (); @@ -5326,9 +5375,9 @@ c4x_rptb_process (loop_start, loop_end) bypass_label = NEXT_INSN (loop_end); #if 0 - forced_labels = gen_rtx (EXPR_LIST, VOIDmode, + forced_labels = gen_rtx_EXPR_LIST (VOIDmode, end_label, forced_labels); - forced_labels = gen_rtx (EXPR_LIST, VOIDmode, + forced_labels = gen_rtx_EXPR_LIST (VOIDmode, bypass_label, forced_labels); #endif emit_insn_after (gen_repeat_block_filler (), end_label); @@ -5363,6 +5412,7 @@ c4x_rptb_process (loop_start, loop_end) } +/* !!! FIXME to emit RPTS correctly. */ int c4x_rptb_rpts_p (insn, op) rtx insn, op; diff --git a/gcc/config/c4x/c4x.h b/gcc/config/c4x/c4x.h index cc92b2a12f9..d68427d3261 100644 --- a/gcc/config/c4x/c4x.h +++ b/gcc/config/c4x/c4x.h @@ -300,6 +300,9 @@ extern char *c4x_rpts_cycles_string, *c4x_cpu_version_string; extern void c4x_override_options (); #define OVERRIDE_OPTIONS c4x_override_options () +/* Define this to change the optimizations performed by default. */ +extern void c4x_optimization_options (); +#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) c4x_optimization_options(LEVEL,SIZE) /* Run Time Target Specification */ @@ -431,6 +434,7 @@ extern void c4x_override_options (); /* Misc registers */ #define IS_ST_REG(r) ((r) == ST_REGNO) +#define IS_RC_REG(r) ((r) == RC_REGNO) #define IS_REPEAT_REG(r) (((r) >= RS_REGNO) && ((r) <= RC_REGNO)) /* Composite register sets */ @@ -455,6 +459,7 @@ extern void c4x_override_options (); #define IS_DP_OR_PSEUDO_REG(r) (IS_DP_REG(r) || IS_PSEUDO_REG(r)) #define IS_SP_OR_PSEUDO_REG(r) (IS_SP_REG(r) || IS_PSEUDO_REG(r)) #define IS_ST_OR_PSEUDO_REG(r) (IS_ST_REG(r) || IS_PSEUDO_REG(r)) +#define IS_RC_OR_PSEUDO_REG(r) (IS_RC_REG(r) || IS_PSEUDO_REG(r)) #define IS_PSEUDO_REGNO(op) (IS_PSEUDO_REG(REGNO(op))) #define IS_ADDR_REGNO(op) (IS_ADDR_REG(REGNO(op))) @@ -473,6 +478,7 @@ extern void c4x_override_options (); #define IS_DP_OR_PSEUDO_REGNO(op) (IS_DP_OR_PSEUDO_REG(REGNO(op))) #define IS_SP_OR_PSEUDO_REGNO(op) (IS_SP_OR_PSEUDO_REG(REGNO(op))) #define IS_ST_OR_PSEUDO_REGNO(op) (IS_ST_OR_PSEUDO_REG(REGNO(op))) +#define IS_RC_OR_PSEUDO_REGNO(op) (IS_RC_OR_PSEUDO_REG(REGNO(op))) /* 1 for registers that have pervasive standard uses and are not available for the register allocator. */ @@ -628,8 +634,9 @@ enum reg_class EXT_REGS, /* 'f' */ ADDR_REGS, /* 'a' */ INDEX_REGS, /* 'x' */ - SP_REG, /* 'b' */ BK_REG, /* 'k' */ + SP_REG, /* 'b' */ + RC_REG, /* 'v' */ INT_REGS, /* 'c' */ GENERAL_REGS, /* 'r' */ DP_REG, /* 'z' */ @@ -649,14 +656,15 @@ enum reg_class "EXT_REGS", \ "ADDR_REGS", \ "INDEX_REGS", \ - "SP_REG", \ "BK_REG", \ + "SP_REG", \ + "RC_REG", \ "INT_REGS", \ "GENERAL_REGS", \ "DP_REG", \ "ST_REG", \ "ALL_REGS" \ -}; +} /* Define which registers fit in which classes. This is an initializer for a vector of HARD_REG_SET @@ -672,8 +680,9 @@ enum reg_class 0xf00000ff, /* 'f' R0-R11 */ \ 0x0000ff00, /* 'a' AR0-AR7 */ \ 0x00060000, /* 'x' IR0-IR1 */ \ - 0x00100000, /* 'b' SP */ \ 0x00080000, /* 'k' BK */ \ + 0x00100000, /* 'b' SP */ \ + 0x08000000, /* 'v' RC */ \ 0x0e1eff00, /* 'c' AR0-AR7, IR0-IR1, RC, RS, RE, BK, SP */ \ 0xfe1effff, /* 'r' R0-R11, AR0-AR7, IR0-IR1, RC, RS, RE, BK, SP */\ 0x00010000, /* 'z' DP */ \ @@ -723,6 +732,7 @@ spill registers. */ q - r0-r7 t - r0-r1 u - r2-r3 + v - repeat count (rc) x - index register (ir0-ir1) y - status register (st) z - dp reg (dp) @@ -756,6 +766,7 @@ spill registers. */ : ((CC) == 'q') ? EXT_LOW_REGS \ : ((CC) == 't') ? R0R1_REGS \ : ((CC) == 'u') ? R2R3_REGS \ + : ((CC) == 'v') ? RC_REG \ : ((CC) == 'x') ? INDEX_REGS \ : ((CC) == 'y') ? ST_REG \ : ((CC) == 'z') ? DP_REG \ @@ -1604,8 +1615,8 @@ extern struct rtx_def *c4x_legitimize_address (); LABEL_REF, SYMBOL_REF, CONST, and HIGH codes. */ #define LEGITIMATE_CONSTANT_P(X) \ - (GET_CODE (X) == CONST_DOUBLE && c4x_H_constant (X) \ - || GET_CODE (X) == CONST_INT && c4x_I_constant (X)) + ((GET_CODE (X) == CONST_DOUBLE && c4x_H_constant (X)) \ + || (GET_CODE (X) == CONST_INT && c4x_I_constant (X))) #define LEGITIMATE_DISPLACEMENT_P(X) IS_DISP8_CONST (INTVAL (X)) @@ -1774,7 +1785,7 @@ do { \ } while (0) /* The TI tooling uses atexit. */ -#define ON_EXIT(FUNC,ARG) atexit (FUNC) +#define HAVE_ATEXIT #undef EXTRA_SECTIONS #define EXTRA_SECTIONS in_const, in_init, in_fini, in_ctors, in_dtors @@ -2475,6 +2486,7 @@ extern void c4x_rptb_process (); {"dp_reg_operand", {REG}}, \ {"sp_reg_operand", {REG}}, \ {"st_reg_operand", {REG}}, \ + {"rc_reg_operand", {REG}}, \ {"call_operand", {REG, SYMBOL_REF}}, \ {"src_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE}}, \ {"src_hi_operand", {SUBREG, REG, MEM, CONST_DOUBLE}}, \ @@ -2535,6 +2547,10 @@ extern int stik_const_operand (); extern int not_const_operand (); +extern int parallel_operand (); + +extern int reg_or_const_operand (); + extern int reg_operand (); extern int reg_imm_operand (); @@ -2551,6 +2567,8 @@ extern int std_reg_operand (); extern int src_operand (); +extern int src_hi_operand (); + extern int lsrc_operand (); extern int tsrc_operand (); diff --git a/gcc/config/c4x/c4x.md b/gcc/config/c4x/c4x.md index 21e62eacc7d..ccccdeb12d9 100644 --- a/gcc/config/c4x/c4x.md +++ b/gcc/config/c4x/c4x.md @@ -1134,8 +1134,8 @@ if (!TARGET_C3X && which_alternative == 3) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - (INTVAL (operands[1]) >> 16) & 0xffff); + operands[1] = gen_rtx_CONST_INT (VOIDmode, + (INTVAL (operands[1]) >> 16) & 0xffff); return \"ldhi\\t%1,%0\"; } @@ -2639,10 +2639,10 @@ "* if (INTVAL (operands[2]) == 8) { - operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[3]) / 8); + operands[3] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[3]) / 8); return \"lb%3\\t%1,%0\"; } - operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[3]) / 16); + operands[3] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[3]) / 16); return \"lh%3\\t%1,%0\"; " [(set_attr "type" "binarycc,binary") @@ -2661,10 +2661,10 @@ "* if (INTVAL (operands[2]) == 8) { - operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[3]) / 8); + operands[3] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[3]) / 8); return \"lb%3\\t%1,%0\"; } - operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[3]) / 16); + operands[3] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[3]) / 16); return \"lh%3\\t%1,%0\"; " [(set_attr "type" "binarycc") @@ -2686,10 +2686,10 @@ "* if (INTVAL (operands[2]) == 8) { - operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[3]) / 8); + operands[3] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[3]) / 8); return \"lb%3\\t%1,%0\"; } - operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[3]) / 16); + operands[3] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[3]) / 16); return \"lh%3\\t%1,%0\"; " [(set_attr "type" "binarycc") @@ -2722,10 +2722,10 @@ "* if (INTVAL (operands[2]) == 8) { - operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[3]) / 8); + operands[3] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[3]) / 8); return \"lbu%3\\t%1,%0\"; } - operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[3]) / 16); + operands[3] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[3]) / 16); return \"lhu%3\\t%1,%0\"; " [(set_attr "type" "binarycc,binary") @@ -2744,10 +2744,10 @@ "* if (INTVAL (operands[2]) == 8) { - operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[3]) / 8); + operands[3] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[3]) / 8); return \"lbu%3\\t%1,%0\"; } - operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[3]) / 16); + operands[3] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[3]) / 16); return \"lhu%3\\t%1,%0\"; " [(set_attr "type" "binarycc") @@ -2769,10 +2769,10 @@ "* if (INTVAL (operands[2]) == 8) { - operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[3]) / 8); + operands[3] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[3]) / 8); return \"lbu%3\\t%1,%0\"; } - operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[3]) / 16); + operands[3] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[3]) / 16); return \"lhu%3\\t%1,%0\"; " [(set_attr "type" "binarycc") @@ -2807,12 +2807,12 @@ "* if (INTVAL (operands[1]) == 8) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) / 8); + operands[2] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[2]) / 8); return \"mb%2\\t%3,%0\"; } else if (INTVAL (operands[1]) == 16) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) / 16); + operands[2] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[2]) / 16); return \"mh%2\\t%3,%0\"; } return \"lwl1\\t%3,%0\"; @@ -2834,10 +2834,10 @@ "* if (INTVAL (operands[1]) == 8) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) / 8); + operands[2] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[2]) / 8); return \"mb%2\\t%3,%0\"; } - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) / 16); + operands[2] = gen_rtx_CONST_INT (VOIDmode, INTVAL (operands[2]) / 16); return \"mh%2\\t%3,%0\"; " [(set_attr "type" "binarycc") @@ -3555,8 +3555,8 @@ enum rtx_code code = GET_CODE (operands[1]); rtx ccreg = c4x_gen_compare_reg (code, c4x_compare_op0, c4x_compare_op1); if (ccreg == NULL_RTX) FAIL; - emit_insn (gen_rtx (SET, QImode, operands[0], - gen_rtx (IF_THEN_ELSE, QImode, + emit_insn (gen_rtx_SET (QImode, operands[0], + gen_rtx_IF_THEN_ELSE (QImode, gen_rtx (code, VOIDmode, ccreg, const0_rtx), operands[2], operands[3]))); DONE;}") @@ -3598,8 +3598,8 @@ enum rtx_code code = GET_CODE (operands[1]); rtx ccreg = c4x_gen_compare_reg (code, c4x_compare_op0, c4x_compare_op1); if (ccreg == NULL_RTX) FAIL; - emit_insn (gen_rtx (SET, QFmode, operands[0], - gen_rtx (IF_THEN_ELSE, QFmode, + emit_insn (gen_rtx_SET (QFmode, operands[0], + gen_rtx_IF_THEN_ELSE (QFmode, gen_rtx (code, VOIDmode, ccreg, const0_rtx), operands[2], operands[3]))); DONE;}") @@ -4294,7 +4294,7 @@ else return \"call\\t%C0\"; } - if (which_alternative == 1) + else { if (final_sequence) return \"laju\\t%R0\"; @@ -4341,7 +4341,7 @@ else return \"call\\t%C1\"; } - if (which_alternative == 1) + else { if (final_sequence) return \"laju\\t%R1\"; @@ -4523,6 +4523,8 @@ ; operand 0 is the loop depth ; operand 1 is the loop count +; operand 2 is the start label +; operand 3 is the end label (define_expand "repeat_block_top" [(set (reg:QI 27) (match_operand:QI 1 "src_operand" "")) (use (match_operand:QI 0 "immediate_operand" "")) @@ -4560,6 +4562,36 @@ [(set_attr "type" "repeat")]) +(define_insn "rptb_end" + [(set (pc) + (if_then_else (ne (match_operand:QI 0 "rc_reg_operand" "v") + (const_int 0)) + (label_ref (match_operand 1 "" "")) + (pc))) + (use (reg:QI 25)) + (use (reg:QI 26)) + (set (match_dup 0) + (plus:QI (match_dup 0) + (const_int -1)))] + "" + "* + return c4x_rptb_nop_p(insn) ? \"nop\" : \"\";" + [(set_attr "type" "repeat")]) + + +(define_expand "decrement_and_branch_on_count" + [(parallel [(set (pc) + (if_then_else (ne (match_operand:QI 0 "rc_reg_operand" "v") + (const_int 0)) + (label_ref (match_operand 1 "" "")) + (pc))) + (use (reg:QI 25)) + (use (reg:QI 26)) + (set (match_dup 0) (plus:QI (match_dup 0) (const_int -1)))])] + "" + "") + + (define_expand "movstrqi_small2" [(parallel [(set (mem:BLK (match_operand:BLK 0 "src_operand" "")) (mem:BLK (match_operand:BLK 1 "src_operand" ""))) @@ -4579,8 +4611,8 @@ len = INTVAL (operands[2]); tmp = operands[4]; - src_mem = gen_rtx (MEM, QImode, src); - dst_mem = gen_rtx (MEM, QImode, dst); + src_mem = gen_rtx_MEM (QImode, src); + dst_mem = gen_rtx_MEM (QImode, dst); emit_insn (gen_movqi (tmp, src_mem)); emit_insn (gen_addqi3_noclobber (src, src, const1_rtx)); @@ -4719,6 +4751,7 @@ output_asm_insn (\"ldi\\t%3-1,%5\", operands); output_asm_insn (\"$1:\tsubi3\\t*%1++,*%2++,%0\", operands); output_asm_insn (\"dbeq\\t%5,$1\", operands); + return \"\"; }") (define_expand "cmpstrqi" @@ -5698,8 +5731,7 @@ rtx op0hi = operand_subword (operands[0], 1, 0, HImode); rtx op0lo = operand_subword (operands[0], 0, 0, HImode); rtx op1lo = operand_subword (operands[1], 0, 0, HImode); - rtx count = gen_rtx (CONST_INT, VOIDmode, - (INTVAL (operands[2]) - 32)); + rtx count = gen_rtx_CONST_INT (VOIDmode, (INTVAL (operands[2]) - 32)); if (INTVAL (count)) emit_insn (gen_ashlqi3 (op0hi, op1lo, count)); @@ -5761,8 +5793,7 @@ rtx op0hi = operand_subword (operands[0], 1, 0, HImode); rtx op0lo = operand_subword (operands[0], 0, 0, HImode); rtx op1hi = operand_subword (operands[1], 1, 0, HImode); - rtx count = gen_rtx (CONST_INT, VOIDmode, - (INTVAL (operands[2]) - 32)); + rtx count = gen_rtx_CONST_INT (VOIDmode, (INTVAL (operands[2]) - 32)); if (INTVAL (count)) emit_insn (gen_lshrqi3 (op0lo, op1hi, count)); @@ -5830,15 +5861,14 @@ rtx op0hi = operand_subword (operands[0], 1, 0, HImode); rtx op0lo = operand_subword (operands[0], 0, 0, HImode); rtx op1hi = operand_subword (operands[1], 1, 0, HImode); - rtx count = gen_rtx (CONST_INT, VOIDmode, - (INTVAL (operands[2]) - 32)); + rtx count = gen_rtx_CONST_INT (VOIDmode, (INTVAL (operands[2]) - 32)); if (INTVAL (count)) emit_insn (gen_ashrqi3 (op0lo, op1hi, count)); else emit_insn (gen_movqi (op0lo, op1hi)); - emit_insn (gen_ashrqi3 (op0hi, op1hi, gen_rtx (CONST_INT, - VOIDmode, 31))); + emit_insn (gen_ashrqi3 (op0hi, op1hi, + gen_rtx_CONST_INT (VOIDmode, 31))); DONE; } emit_insn (gen_ashrhi3_reg (operands[0], operands[1], operands[2])); diff --git a/gcc/config/c4x/t-c4x b/gcc/config/c4x/t-c4x index e6964740c8d..1a16b90444c 100644 --- a/gcc/config/c4x/t-c4x +++ b/gcc/config/c4x/t-c4x @@ -21,9 +21,6 @@ INSTALL_LIBGCC = install-multilib # Don't make libgcc1-test since require crt0.o LIBGCC1_TEST = -# Don't make objective C because we can't compile the libraries. -LANGUAGES = c proto c++ - # C[34]x has its own float and limits.h TARGET_FLOAT_H=config/c4x/c4x-float.h TARGET_LIMITS_H=config/c4x/c4x-limits.h -- 2.30.2